aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/mach-exynos
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2013-07-02 14:42:51 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2013-07-02 14:42:51 -0700
commit42daabf62bfa3c00974b43f030dadcf704c0db59 (patch)
tree255f279cad48557227d974d67cbbc8390d057404 /arch/arm/mach-exynos
parent0bf6a210a43f7118d858806200127e421649fc4e (diff)
parent8c3d913888cfb0066d62831969c3a992f7e4aba5 (diff)
downloadlinux-linaro-stable-42daabf62bfa3c00974b43f030dadcf704c0db59.tar.gz
Merge tag 'late-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late changes from Arnd Bergmann: "These are changes that arrived a little late before the merge window or that have multiple dependencies on previous branches so they did not fit into one of the earlier ones. There are 10 branches merged here, a total of 39 non-merge commits. Contents are a mixed bag for the above reasons: * Two new SoC platforms: ST microelectronics stixxxx and the TI 'Nspire' graphing calculator. These should have been in the 'soc' branch but were a little late * Support for the Exynos 5420 variant in mach-exynos, which is based on the other exynos branches to avoid conflicts. * Various small changes for sh-mobile, ux500 and davinci * Common clk support for MSM" * tag 'late-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits) ARM: ux500: bail out on alien cpus ARM: davinci: da850: adopt to pinctrl-single change for configuring multiple pins serial: sh-sci: Initialise variables before access in sci_set_termios() ARM: stih41x: Add B2020 board support ARM: stih41x: Add B2000 board support ARM: sti: Add DEBUG_LL console support ARM: sti: Add STiH416 SOC support ARM: sti: Add STiH415 SOC support ARM: msm: Migrate to common clock framework ARM: msm: Make proc_comm clock control into a platform driver ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driver ARM: msm: Remove clock-7x30.h include file ARM: msm: Remove custom clk_set_{max,min}_rate() API ARM: msm: Remove custom clk_set_flags() API msm: iommu: Use clk_set_rate() instead of clk_set_min_rate() msm: iommu: Convert to clk_prepare/unprepare msm_sdcc: Convert to clk_prepare/unprepare usb: otg: msm: Convert to clk_prepare/unprepare msm_serial: Use devm_clk_get() and properly return errors msm_serial: Convert to clk_prepare/unprepare ...
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r--arch/arm/mach-exynos/Kconfig10
-rw-r--r--arch/arm/mach-exynos/common.c18
-rw-r--r--arch/arm/mach-exynos/include/mach/uncompress.h7
-rw-r--r--arch/arm/mach-exynos/mach-exynos5-dt.c1
-rw-r--r--arch/arm/mach-exynos/platsmp.c12
5 files changed, 34 insertions, 14 deletions
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 0ecd5af20545..2d503b3684c4 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -78,6 +78,16 @@ config SOC_EXYNOS5250
help
Enable EXYNOS5250 SoC support
+config SOC_EXYNOS5420
+ bool "SAMSUNG EXYNOS5420"
+ default y
+ depends on ARCH_EXYNOS5
+ select PM_GENERIC_DOMAINS if PM
+ select S5P_PM if PM
+ select S5P_SLEEP if PM
+ help
+ Enable EXYNOS5420 SoC support
+
config SOC_EXYNOS5440
bool "SAMSUNG EXYNOS5440"
default y
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 81e6320ca091..2c655db4b78e 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -53,6 +53,7 @@ static const char name_exynos4210[] = "EXYNOS4210";
static const char name_exynos4212[] = "EXYNOS4212";
static const char name_exynos4412[] = "EXYNOS4412";
static const char name_exynos5250[] = "EXYNOS5250";
+static const char name_exynos5420[] = "EXYNOS5420";
static const char name_exynos5440[] = "EXYNOS5440";
static void exynos4_map_io(void);
@@ -86,6 +87,12 @@ static struct cpu_table cpu_ids[] __initdata = {
.init = exynos_init,
.name = name_exynos5250,
}, {
+ .idcode = EXYNOS5420_SOC_ID,
+ .idmask = EXYNOS5_SOC_MASK,
+ .map_io = exynos5_map_io,
+ .init = exynos_init,
+ .name = name_exynos5420,
+ }, {
.idcode = EXYNOS5440_SOC_ID,
.idmask = EXYNOS5_SOC_MASK,
.map_io = exynos5440_map_io,
@@ -289,10 +296,10 @@ void exynos5_restart(char mode, const char *cmd)
u32 val;
void __iomem *addr;
- if (of_machine_is_compatible("samsung,exynos5250")) {
- val = 0x1;
- addr = EXYNOS_SWRESET;
- } else if (of_machine_is_compatible("samsung,exynos5440")) {
+ val = 0x1;
+ addr = EXYNOS_SWRESET;
+
+ if (of_machine_is_compatible("samsung,exynos5440")) {
u32 status;
np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-clock");
@@ -303,9 +310,6 @@ void exynos5_restart(char mode, const char *cmd)
val = __raw_readl(addr);
val = (val & 0xffff0000) | (status & 0xffff);
- } else {
- pr_err("%s: cannot support non-DT\n", __func__);
- return;
}
__raw_writel(val, addr);
diff --git a/arch/arm/mach-exynos/include/mach/uncompress.h b/arch/arm/mach-exynos/include/mach/uncompress.h
index d405762be183..5d7ce36be46f 100644
--- a/arch/arm/mach-exynos/include/mach/uncompress.h
+++ b/arch/arm/mach-exynos/include/mach/uncompress.h
@@ -28,13 +28,12 @@ static void arch_detect_cpu(void)
/*
* product_id is bits 31:12
- * bits 23:20 describe the exynosX family
- *
+ * bits 23:20 describe the exynosX family
+ * bits 27:24 describe the exynosX family in exynos5420
*/
chip_id >>= 20;
- chip_id &= 0xf;
- if (chip_id == 0x5)
+ if ((chip_id & 0x0f) == 0x5 || (chip_id & 0xf0) == 0x50)
uart_base = (volatile u8 *)EXYNOS5_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
else
uart_base = (volatile u8 *)EXYNOS4_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index d5c8afdeaa39..f874b773ca13 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -52,6 +52,7 @@ static void __init exynos5_dt_machine_init(void)
static char const *exynos5_dt_compat[] __initdata = {
"samsung,exynos5250",
+ "samsung,exynos5420",
"samsung,exynos5440",
NULL
};
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index d9c6d0ab6a0c..deba1308ff16 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -50,6 +50,8 @@ static inline void __iomem *cpu_boot_reg(int cpu)
boot_reg = cpu_boot_reg_base();
if (soc_is_exynos4412())
boot_reg += 4*cpu;
+ else if (soc_is_exynos5420())
+ boot_reg += 4;
return boot_reg;
}
@@ -180,10 +182,14 @@ static void __init exynos_smp_init_cpus(void)
void __iomem *scu_base = scu_base_addr();
unsigned int i, ncores;
- if (soc_is_exynos5250())
- ncores = 2;
- else
+ if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
ncores = scu_base ? scu_get_core_count(scu_base) : 1;
+ else
+ /*
+ * CPU Nodes are passed thru DT and set_cpu_possible
+ * is set by "arm_dt_init_cpu_maps".
+ */
+ return;
/* sanity check */
if (ncores > nr_cpu_ids) {