diff options
| author | Alexander Shiyan <shc_work@mail.ru> | 2012-11-17 17:57:13 +0400 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2012-11-21 09:57:41 -0800 |
| commit | 0d8be81c0e15ad8ebdd35bbbeb35b03f85a4b558 (patch) | |
| tree | a4bab572e19ef5f70e9aa0564026e5307be524d2 /arch/arm/mach-clps711x/include | |
| parent | 86449336dd3c6e0edf97b971db2daa88917c1d7e (diff) | |
ARM: clps711x: Implement usage "SPARSE_IRQ" kernel option for a platform
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-clps711x/include')
| -rw-r--r-- | arch/arm/mach-clps711x/include/mach/clps711x.h | 21 | ||||
| -rw-r--r-- | arch/arm/mach-clps711x/include/mach/irqs.h | 46 |
2 files changed, 21 insertions, 46 deletions
diff --git a/arch/arm/mach-clps711x/include/mach/clps711x.h b/arch/arm/mach-clps711x/include/mach/clps711x.h index aee352c00a1f..1f4728d414d7 100644 --- a/arch/arm/mach-clps711x/include/mach/clps711x.h +++ b/arch/arm/mach-clps711x/include/mach/clps711x.h @@ -277,4 +277,25 @@ #define MEMCFG_WAITSTATE_2_0 (14 << 2) #define MEMCFG_WAITSTATE_1_0 (15 << 2) +/* INTSR1 Interrupts */ +#define IRQ_CSINT (4) +#define IRQ_EINT1 (5) +#define IRQ_EINT2 (6) +#define IRQ_EINT3 (7) +#define IRQ_TC1OI (8) +#define IRQ_TC2OI (9) +#define IRQ_RTCMI (10) +#define IRQ_TINT (11) +#define IRQ_UTXINT1 (12) +#define IRQ_URXINT1 (13) +#define IRQ_UMSINT (14) +#define IRQ_SSEOTI (15) + +/* INTSR2 Interrupts */ +#define IRQ_KBDINT (16 + 0) +#define IRQ_SS2RX (16 + 1) +#define IRQ_SS2TX (16 + 2) +#define IRQ_UTXINT2 (16 + 12) +#define IRQ_URXINT2 (16 + 13) + #endif /* __MACH_CLPS711X_H */ diff --git a/arch/arm/mach-clps711x/include/mach/irqs.h b/arch/arm/mach-clps711x/include/mach/irqs.h deleted file mode 100644 index 1ea56db2fd5f..000000000000 --- a/arch/arm/mach-clps711x/include/mach/irqs.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * arch/arm/mach-clps711x/include/mach/irqs.h - * - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -/* - * Interrupts from INTSR1 - */ -#define IRQ_CSINT 4 -#define IRQ_EINT1 5 -#define IRQ_EINT2 6 -#define IRQ_EINT3 7 -#define IRQ_TC1OI 8 -#define IRQ_TC2OI 9 -#define IRQ_RTCMI 10 -#define IRQ_TINT 11 -#define IRQ_UTXINT1 12 -#define IRQ_URXINT1 13 -#define IRQ_UMSINT 14 -#define IRQ_SSEOTI 15 - -/* - * Interrupts from INTSR2 - */ -#define IRQ_KBDINT (16+0) /* bit 0 */ -#define IRQ_SS2RX (16+1) /* bit 1 */ -#define IRQ_SS2TX (16+2) /* bit 2 */ -#define IRQ_UTXINT2 (16+12) /* bit 12 */ -#define IRQ_URXINT2 (16+13) /* bit 13 */ - -#define NR_IRQS 30 |