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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2005-04-18 22:50:01 +0100
committerRussell King <rmk@dyn-67.arm.linux.org.uk>2005-04-18 22:50:01 +0100
commit7a55fd0bb31eb369149b89fdf9e0c7bc73486ee1 (patch)
tree4e0333e6a0b6ee4601b0232baa1c5d4832c4aec5 /arch/arm/lib/bitops.h
parent9c7d3b3a6b6aaeded9d9e5c5111dbcc65b0b0f91 (diff)
downloadlinux-linaro-stable-7a55fd0bb31eb369149b89fdf9e0c7bc73486ee1.tar.gz
[PATCH] ARM: Add missing new file for bitops patch
Signed-off-by: Russell King <rmk@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/lib/bitops.h')
-rw-r--r--arch/arm/lib/bitops.h33
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
new file mode 100644
index 000000000000..4a83ab6cd565
--- /dev/null
+++ b/arch/arm/lib/bitops.h
@@ -0,0 +1,33 @@
+ .macro bitop, instr
+ and r2, r0, #7
+ mov r3, #1
+ mov r3, r3, lsl r2
+ save_and_disable_irqs ip, r2
+ ldrb r2, [r1, r0, lsr #3]
+ \instr r2, r2, r3
+ strb r2, [r1, r0, lsr #3]
+ restore_irqs ip
+ mov pc, lr
+ .endm
+
+/**
+ * testop - implement a test_and_xxx_bit operation.
+ * @instr: operational instruction
+ * @store: store instruction
+ *
+ * Note: we can trivially conditionalise the store instruction
+ * to avoid dirting the data cache.
+ */
+ .macro testop, instr, store
+ add r1, r1, r0, lsr #3
+ and r3, r0, #7
+ mov r0, #1
+ save_and_disable_irqs ip, r2
+ ldrb r2, [r1]
+ tst r2, r0, lsl r3
+ \instr r2, r2, r0, lsl r3
+ \store r2, [r1]
+ restore_irqs ip
+ moveq r0, #0
+ mov pc, lr
+ .endm