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authorMasahiro Yamada <yamada.masahiro@socionext.com>2015-10-02 13:42:19 +0900
committerOlof Johansson <olof@lixom.net>2015-10-27 09:20:50 +0900
commite7ecbc057bc5cffb8ad10b6bf7a80684fd426d23 (patch)
treed3d5e1647981c5690d4a66270ab246a60ebe7e01 /arch/arm/kernel
parent156746b1733057e50b3b3cb33c3669dac06676ab (diff)
downloadlinux-linaro-stable-e7ecbc057bc5cffb8ad10b6bf7a80684fd426d23.tar.gz
ARM: uniphier: add outer cache support
This commit adds support for UniPhier outer cache controller. All the UniPhier SoCs are equipped with the L2 cache, while the L3 cache is currently only integrated on PH1-Pro5 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/kernel')
-rw-r--r--arch/arm/kernel/irq.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 2766183e69df..1d45320ee125 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -39,6 +39,7 @@
#include <linux/export.h>
#include <asm/hardware/cache-l2x0.h>
+#include <asm/hardware/cache-uniphier.h>
#include <asm/outercache.h>
#include <asm/exception.h>
#include <asm/mach/arch.h>
@@ -97,6 +98,8 @@ void __init init_IRQ(void)
if (ret)
pr_err("L2C: failed to init: %d\n", ret);
}
+
+ uniphier_cache_init();
}
#ifdef CONFIG_MULTI_IRQ_HANDLER