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authorLior Amsalem <alior@marvell.com>2013-04-09 00:52:11 +0200
committerJason Cooper <jason@lakedaemon.net>2013-04-15 14:06:59 +0000
commitda497f6fbaa190d34907ecc9dd85cfc62ba9f5a2 (patch)
tree8956f170acb39f9875b699759e28372eac413018 /arch/arm/include/debug/mvebu.S
parent99ff056193924005e650ab3f1719995c3ca82646 (diff)
downloadlinux-linaro-stable-da497f6fbaa190d34907ecc9dd85cfc62ba9f5a2.tar.gz
ARM: mvebu: Align the internal registers virtual base to support LPAE
In order to be able to support the LPAE, the internal registers virtual base must be aligned to 2MB. In LPAE section size is 2MB, in earlyprintk we map the internal registers and it must be section aligned. Signed-off-by: Lior Amsalem <alior@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/include/debug/mvebu.S')
-rw-r--r--arch/arm/include/debug/mvebu.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/debug/mvebu.S b/arch/arm/include/debug/mvebu.S
index 865c6d02b332..df191afa3be1 100644
--- a/arch/arm/include/debug/mvebu.S
+++ b/arch/arm/include/debug/mvebu.S
@@ -12,7 +12,7 @@
*/
#define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000
-#define ARMADA_370_XP_REGS_VIRT_BASE 0xfeb00000
+#define ARMADA_370_XP_REGS_VIRT_BASE 0xfec00000
.macro addruart, rp, rv, tmp
ldr \rp, =ARMADA_370_XP_REGS_PHYS_BASE