diff options
| author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2011-06-28 12:42:56 -0700 |
|---|---|---|
| committer | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2011-09-23 12:05:30 +0530 |
| commit | 8fb54284ba6aa1f0d832ec015fde64ecf4bb0f4f (patch) | |
| tree | 1c9a5d9f0c57af407085f2d74ef8c3bd63ecb34e /arch/arm/include/asm/pgtable.h | |
| parent | 48af9feab5e3bdf21af3a929ecc7c0b79d9a4a4e (diff) | |
ARM: mm: Add strongly ordered descriptor support.
On certain architectures, there might be a need to mark certain
addresses with strongly ordered memory attributes to avoid ordering
issues at the interconnect level.
On OMAP4, the asynchronous bridge buffers can only be drained
with strongly ordered accesses and hence the need to mark the
memory strongly ordered.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Woodruff Richard <r-woodruff2@ti.com>
Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
Diffstat (limited to 'arch/arm/include/asm/pgtable.h')
| -rw-r--r-- | arch/arm/include/asm/pgtable.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index 5750704e0271..f1956b27ae5a 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h @@ -232,6 +232,9 @@ extern pgprot_t pgprot_kernel; #define pgprot_writecombine(prot) \ __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE) +#define pgprot_stronglyordered(prot) \ + __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED) + #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE #define pgprot_dmacoherent(prot) \ __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE | L_PTE_XN) |