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authorLee Jones <lee.jones@linaro.org>2015-01-22 11:07:00 +0100
committerMaxime Coquelin <maxime.coquelin@st.com>2015-04-29 16:09:41 +0200
commitb0bb2bae194f17cdc8d455c1d4503bc3bf733897 (patch)
treec88a57caec8da7576058113ad9a28406b539ba1a /arch/arm/boot/dts/stih407-family.dtsi
parent2c53c272d0d8757e506b16b3c291c5ec193c8ef5 (diff)
ARM: sti: Provide DT nodes for SBC SSC[0..2]
The Synchronous Serial Controller is used to provide SPI. These are the ports which are located on the Stand-By Controller (SBC). Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stih407-family.dtsi')
-rw-r--r--arch/arm/boot/dts/stih407-family.dtsi31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 9eba0dc59b42..655f8544a673 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -390,5 +390,36 @@
status = "disabled";
};
+
+ /* SBC SSC */
+ spi@9540000 {
+ compatible = "st,comms-ssc4-spi";
+ reg = <0x9540000 0x110>;
+ interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_sysin>;
+ clock-names = "ssc";
+
+ status = "disabled";
+ };
+
+ spi@9541000 {
+ compatible = "st,comms-ssc4-spi";
+ reg = <0x9541000 0x110>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_sysin>;
+ clock-names = "ssc";
+
+ status = "disabled";
+ };
+
+ spi@9542000 {
+ compatible = "st,comms-ssc4-spi";
+ reg = <0x9542000 0x110>;
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_sysin>;
+ clock-names = "ssc";
+
+ status = "disabled";
+ };
};
};