diff options
| author | Murali Karicheri <m-karicheri2@ti.com> | 2013-11-23 16:26:11 -0500 |
|---|---|---|
| committer | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2013-12-12 20:29:17 -0500 |
| commit | afdd8b61115801c2fdb2b407eb879fd995ec8af4 (patch) | |
| tree | a7192ba5378f04b324157f0846d68ca19767f9a3 /arch/arm/boot/dts/keystone-clocks.dtsi | |
| parent | b8273f2eb5d266755a2ae2db39b2cc16f29b0941 (diff) | |
ARM: keystone: dts: fix typo in the ddr3 pllclk node name
Fix following typo
ddr3allclk -> ddr3apllclk
ddr3bllclk -> ddr3bpllclk
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/boot/dts/keystone-clocks.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/keystone-clocks.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/keystone-clocks.dtsi b/arch/arm/boot/dts/keystone-clocks.dtsi index 67e70ec410d6..2a2f247a9263 100644 --- a/arch/arm/boot/dts/keystone-clocks.dtsi +++ b/arch/arm/boot/dts/keystone-clocks.dtsi @@ -31,7 +31,7 @@ clocks { reg-names = "control"; }; - ddr3allclk: ddr3apllclk@2620360 { + ddr3apllclk: ddr3apllclk@2620360 { #clock-cells = <0>; compatible = "ti,keystone,pll-clock"; clocks = <&refclkddr3a>; @@ -40,7 +40,7 @@ clocks { reg-names = "control"; }; - ddr3bllclk: ddr3bpllclk@2620368 { + ddr3bpllclk: ddr3bpllclk@2620368 { #clock-cells = <0>; compatible = "ti,keystone,pll-clock"; clocks = <&refclkddr3b>; |