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authorHyok S. Choi <hyok.choi@samsung.com>2006-09-26 17:36:37 +0900
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-27 17:34:30 +0100
commitf12d0d7c7786af39435ef6ae9defe47fb58f6091 (patch)
tree03361f2b925754f2acf4f311df2122f844d3d4fe /arch/arm/Kconfig-nommu
parentfefdaa06ccdde394be865ed76509be82813e425b (diff)
downloadlinux-linaro-stable-f12d0d7c7786af39435ef6ae9defe47fb58f6091.tar.gz
[ARM] nommu: manage the CP15 things
All the current CP15 access codes in ARM arch can be categorized and conditioned by the defines as follows: Related operation Safe condition a. any CP15 access !CPU_CP15 b. alignment trap CPU_CP15_MMU c. D-cache(C-bit) CPU_CP15 d. I-cache CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 || CPU_ARM720 || CPU_ARM740 || CPU_XSCALE || CPU_XSC3 ) e. alternate vector CPU_CP15 && !CPU_ARM740 f. TTB CPU_CP15_MMU g. Domain CPU_CP15_MMU h. FSR/FAR CPU_CP15_MMU For example, alternate vector is supported if and only if "CPU_CP15 && !CPU_ARM740" is satisfied. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/Kconfig-nommu')
-rw-r--r--arch/arm/Kconfig-nommu8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/Kconfig-nommu b/arch/arm/Kconfig-nommu
index e1574be2ded6..f087376748d1 100644
--- a/arch/arm/Kconfig-nommu
+++ b/arch/arm/Kconfig-nommu
@@ -25,6 +25,14 @@ config FLASH_SIZE
hex 'FLASH Size' if SET_MEM_PARAM
default 0x00400000
+config PROCESSOR_ID
+ hex
+ default 0x00007700
+ depends on !CPU_CP15
+ help
+ If processor has no CP15 register, this processor ID is
+ used instead of the auto-probing which utilizes the register.
+
config REMAP_VECTORS_TO_RAM
bool 'Install vectors to the begining of RAM' if DRAM_BASE
depends on DRAM_BASE