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authorHelge Deller <deller@gmx.de>2013-06-29 13:24:16 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-07-21 18:21:26 -0700
commitfa8223db1d69e6de9c7c7210804e8bb284067954 (patch)
treefb2b7ac0cec179ef0034366a7c70998c7cffcbdf /Documentation
parentb6891ed4e66b65e5d6bb36964af0d65a08590018 (diff)
downloadlinux-linaro-stable-fa8223db1d69e6de9c7c7210804e8bb284067954.tar.gz
parisc: document the shadow registers
commit a83f58bcb24003b9de2364de7c829a263423ead7 upstream. Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/parisc/registers8
1 files changed, 8 insertions, 0 deletions
diff --git a/Documentation/parisc/registers b/Documentation/parisc/registers
index dd3caddd1ad9..10c7d1730f5d 100644
--- a/Documentation/parisc/registers
+++ b/Documentation/parisc/registers
@@ -78,6 +78,14 @@ Shadow Registers used by interruption handler code
TOC enable bit 1
=========================================================================
+
+The PA-RISC architecture defines 7 registers as "shadow registers".
+Those are used in RETURN FROM INTERRUPTION AND RESTORE instruction to reduce
+the state save and restore time by eliminating the need for general register
+(GR) saves and restores in interruption handlers.
+Shadow registers are the GRs 1, 8, 9, 16, 17, 24, and 25.
+
+=========================================================================
Register usage notes, originally from John Marvin, with some additional
notes from Randolph Chung.