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authorYingjoe Chen <yingjoe.chen@mediatek.com>2014-11-25 16:04:22 +0800
committerAlex Shi <alex.shi@linaro.org>2015-11-07 11:36:41 +0800
commit9609032b2e8147f375bd56ede7db333feaa1c08b (patch)
tree11185baf9e6338047f110866768e7035ac1164e7 /Documentation
parent953d39bdcbba4835647e4fe9452d0ff97ec9a2cf (diff)
downloadlinux-linaro-stable-9609032b2e8147f375bd56ede7db333feaa1c08b.tar.gz
irqchip: mtk-sysirq: dt-bindings: Add bindings for mediatek sysirq
Add binding documentation for Mediatek SoC SYSIRQ. Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Link: https://lkml.kernel.org/r/1416902662-19281-5-git-send-email-yingjoe.chen@mediatek.com Signed-off-by: Jason Cooper <jason@lakedaemon.net> (cherry picked from commit f4e27e30b3663a8652746d1c7d1649a5fa8c0e6c) Signed-off-by: Alex Shi <alex.shi@linaro.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt28
1 files changed, 28 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt
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index 000000000000..d680b07ec6e8
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+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt
@@ -0,0 +1,28 @@
+Mediatek 65xx/81xx sysirq
+
+Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI
+interrupt.
+
+Required properties:
+- compatible: should be one of:
+ "mediatek,mt8135-sysirq"
+ "mediatek,mt8127-sysirq"
+ "mediatek,mt6589-sysirq"
+ "mediatek,mt6582-sysirq"
+ "mediatek,mt6577-sysirq"
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Use the same format as specified by GIC in
+ Documentation/devicetree/bindings/arm/gic.txt
+- interrupt-parent: phandle of irq parent for sysirq. The parent must
+ use the same interrupt-cells format as GIC.
+- reg: Physical base address of the intpol registers and length of memory
+ mapped region.
+
+Example:
+ sysirq: interrupt-controller@10200100 {
+ compatible = "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
+ reg = <0 0x10200100 0 0x1c>;
+ };