|author||Lucas De Marchi <email@example.com>||2011-03-30 22:57:33 -0300|
|committer||Lucas De Marchi <firstname.lastname@example.org>||2011-03-31 11:26:23 -0300|
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <email@example.com>
Diffstat (limited to 'Documentation/spi')
2 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/spi/pxa2xx b/Documentation/spi/pxa2xx
index 68a4fe3818a1..493dada57372 100644
@@ -143,7 +143,7 @@ configured to use SSPFRM instead.
NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the
chipselect is dropped after each spi_transfer. Most devices need chip select
asserted around the complete message. Use SSPFRM as a GPIO (through cs_control)
-to accomodate these chips.
+to accommodate these chips.
NSSP SLAVE SAMPLE
diff --git a/Documentation/spi/spi-lm70llp b/Documentation/spi/spi-lm70llp
index 34a9cfd746bd..463f6d01fa15 100644
@@ -46,7 +46,7 @@ The hardware interfacing on the LM70 LLP eval board is as follows:
Note that since the LM70 uses a "3-wire" variant of SPI, the SI/SO pin
is connected to both pin D7 (as Master Out) and Select (as Master In)
-using an arrangment that lets either the parport or the LM70 pull the
+using an arrangement that lets either the parport or the LM70 pull the
pin low. This can't be shared with true SPI devices, but other 3-wire
devices might share the same SI/SO pin.