Merge tag 'v3.18.22' of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable into linux-linaro-lsk-v3.18

Linux 3.18.22

* tag 'v3.18.22' of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable: (178 commits)
  Linux 3.18.22
  net: call rcu_read_lock early in process_backlog
  lpfc: Fix scsi prep dma buf error.
  rds: fix an integer overflow test in rds_info_getsockopt()
  net/mlx4_core: Fix wrong index in propagating port change event to VFs
  netlink: don't hold mutex in rcu callback when releasing mmapd ring
  inet: frags: fix defragmented packet's IP header for af_packet
  bonding: correct the MAC address for "follow" fail_over_mac policy
  bonding: fix destruction of bond with devices different from arphrd_ether
  ipv6: lock socket in ip6_datagram_connect()
  isdn/gigaset: reset tty->receive_room when attaching ser_gigaset
  bridge: mdb: fix double add notification
  net: Fix skb csum races when peeking
  net: do not process device backlog during unregistration
  net: pktgen: fix race between pktgen_thread_worker() and kthread_stop()
  bridge: mdb: zero out the local br_ip variable before use
  net/tipc: initialize security state for new connection socket
  ip_tunnel: fix ipv4 pmtu check to honor inner ip header df
  net: graceful exit from netif_alloc_netdev_queues()
  ipv6: Make MLD packets to only be processed locally
  ...

1 files changed, 4 insertions, 4 deletions

diff --git a/Documentation/devicetree/bindings/clock/keystone-pll.txt b/Documentation/devicetree/bindings/clock/keystone-pll.txt
index 225990f79b7c..47570d207215 100644
--- a/Documentation/devicetree/bindings/clock/keystone-pll.txt
+++ b/Documentation/devicetree/bindings/clock/keystone-pll.txt
@@ -15,8 +15,8 @@ Required properties:
 - compatible : shall be "ti,keystone,main-pll-clock" or "ti,keystone,pll-clock"
 - clocks : parent clock phandle
 - reg - pll control0 and pll multipler registers
-- reg-names : control and multiplier. The multiplier is applicable only for
-		main pll clock
+- reg-names : control, multiplier and post-divider. The multiplier and
+		post-divider registers are applicable only for main pll clock
 - fixed-postdiv : fixed post divider value. If absent, use clkod register bits
 		for postdiv
 
@@ -25,8 +25,8 @@ Example:
 		#clock-cells = <0>;
 		compatible = "ti,keystone,main-pll-clock";
 		clocks = <&refclksys>;
-		reg = <0x02620350 4>, <0x02310110 4>;
-		reg-names = "control", "multiplier";
+		reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
+		reg-names = "control", "multiplier", "post-divider";
 		fixed-postdiv = <2>;
 	};