diff options
authorKevin Hilman <khilman@linaro.org>2015-05-18 16:18:16 -0700
committerKevin Hilman <khilman@linaro.org>2015-05-18 16:18:16 -0700
commit8a95b5736641a5cd3996e4fe4c0af6ea05cfa86c (patch)
parent106f1ce29f1fa7ad18e47823789c176df57d75ee (diff)
parenta0121477d2c5e7b62436edca6dac4cd8058c15a5 (diff)
Merge branch 'v3.10/topic/arm64-errata' into linux-linaro-lsk-v3.10
* v3.10/topic/arm64-errata: arm64: errata: add workaround for cortex-a53 erratum #845719 arm64: Remove unused cpu_name ascii in arch/arm64/mm/proc.S
2 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 7ac540c14bce..9742106cb51c 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -157,6 +157,32 @@ endmenu
menu "Kernel Features"
+menu "ARM errata workarounds"
+config ARM64_ERRATUM_845719
+ bool "Cortex-A53: 845719: a load might read incorrect data"
+ depends on COMPAT
+ default n
+ help
+ This option adds an alternative code sequence to work around ARM
+ erratum 845719 on Cortex-A53 parts up to r0p4.
+ When running a compat (AArch32) userspace on an affected Cortex-A53
+ part, a load at EL0 from a virtual address that matches the bottom 32
+ bits of the virtual address used by a recent load at (AArch64) EL1
+ might return incorrect data.
+ The workaround is to write the contextidr_el1 register on exception
+ return to a 32-bit task.
+ Please note that this does not necessarily enable the workaround,
+ as it depends on the alternative framework, which will only patch
+ the kernel if an affected CPU is detected.
+ If unsure, say Y.
config ARM64_64K_PAGES
bool "Enable 64KB pages support"
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 56ef569b2b62..1ee38bd61f03 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -89,6 +89,17 @@
ldp x21, x22, [sp, #S_PC] // load ELR, SPSR
.if \el == 0
ldr x23, [sp, #S_SP] // load return stack pointer
+#ifdef CONFIG_ARM64_ERRATUM_845719
+ tbz x22, #4, 1f
+ mrs x29, contextidr_el1
+ msr contextidr_el1, x29
+ msr contextidr_el1, xzr
.if \ret
ldr x1, [sp, #S_X1] // preserve x0 (syscall return)