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authorMike Dyer <mike.dyer@md-soft.co.uk>2013-08-16 18:36:28 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-09-26 17:15:33 -0700
commit64c2a17997fe074edc5c10d8f687ba590c2c2572 (patch)
tree99891eda840d41cc102df1ec183361d612e3bbdb
parenta7179b89a68c7cb6f8623cedcce02b98d9e072a1 (diff)
downloadlinux-linaro-stable-64c2a17997fe074edc5c10d8f687ba590c2c2572.tar.gz
ASoC: wm8960: Fix PLL register writes
commit 85fa532b6ef920b32598df86b194571a7059a77c upstream. Bit 9 of PLL2,3 and 4 is reserved as '0'. The 24bit fractional part should be split across each register in 8bit chunks. Signed-off-by: Mike Dyer <mike.dyer@md-soft.co.uk> Signed-off-by: Mark Brown <broonie@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--sound/soc/codecs/wm8960.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c
index 840d72086d04..ddb0d904a353 100644
--- a/sound/soc/codecs/wm8960.c
+++ b/sound/soc/codecs/wm8960.c
@@ -790,9 +790,9 @@ static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
if (pll_div.k) {
reg |= 0x20;
- snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f);
- snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff);
- snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0x1ff);
+ snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
+ snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
+ snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0xff);
}
snd_soc_write(codec, WM8960_PLL1, reg);