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authorAlan Stern <stern@rowland.harvard.edu>2006-11-25 02:47:52 +0100
committerAdrian Bunk <bunk@stusta.de>2006-11-25 02:47:52 +0100
commit28bb4422588c130715fc0a39b32a366d29bb2f1b (patch)
treea372c2d7307d6f139d2689686ef0346676882892
parent6ea24476068fae8b9c95bf67615436c02f737a5f (diff)
downloadlinux-linaro-stable-28bb4422588c130715fc0a39b32a366d29bb2f1b.tar.gz
USB: UHCI: Increase port-reset completion delay for HP controllers
This patch (as657) increases the port-reset completion delay in uhci-hcd for HP's embedded controllers. Unlike other UHCI controllers, the HP chips can take as long as 250 us to carry out the processing associated with finishing a port reset. This fixes Novell bug #148761. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
-rw-r--r--drivers/usb/host/uhci-hub.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/usb/host/uhci-hub.c b/drivers/usb/host/uhci-hub.c
index a71e48a66805..152971d16769 100644
--- a/drivers/usb/host/uhci-hub.c
+++ b/drivers/usb/host/uhci-hub.c
@@ -99,6 +99,21 @@ static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
}
}
+/* Wait for the UHCI controller in HP's iLO2 server management chip.
+ * It can take up to 250 us to finish a reset and set the CSC bit.
+ */
+static void wait_for_HP(unsigned long port_addr)
+{
+ int i;
+
+ for (i = 10; i < 250; i += 10) {
+ if (inw(port_addr) & USBPORTSC_CSC)
+ return;
+ udelay(10);
+ }
+ /* Log a warning? */
+}
+
static void uhci_check_ports(struct uhci_hcd *uhci)
{
unsigned int port;
@@ -113,6 +128,12 @@ static void uhci_check_ports(struct uhci_hcd *uhci)
CLR_RH_PORTSTAT(USBPORTSC_PR);
udelay(10);
+ /* HP's server management chip requires
+ * a longer delay. */
+ if (to_pci_dev(uhci_dev(uhci))->vendor ==
+ PCI_VENDOR_ID_HP)
+ wait_for_HP(port_addr);
+
/* If the port was enabled before, turning
* reset on caused a port enable change.
* Turning reset off causes a port connect