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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-06-30 08:45:49 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-06-30 08:47:35 +0100
commitcbe263497def23befb6f475977661bae5d1f82e4 (patch)
tree61d94af049ab285f0067c4a8e8a92c5763f1bd6f
parent46e130d298a384b677426e19faec311749ff2677 (diff)
downloadlinux-linaro-stable-cbe263497def23befb6f475977661bae5d1f82e4.tar.gz
ARM: pm: omap3: move saving of the auxiliary control registers to C
Move the saving of the auxiliary control registers into C; there's no need for this to be in assembly code. This results in less assembly code to deal with in OMAP. Kevin tested full-chip retention and off on 3430/n900, 3530/Overo and 3630/Zoom3. Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-omap2/pm.h2
-rw-r--r--arch/arm/mach-omap2/pm34xx.c19
-rw-r--r--arch/arm/mach-omap2/sleep34xx.S12
3 files changed, 21 insertions, 12 deletions
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index a4ec213e30c0..04ee56646126 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -97,7 +97,7 @@ extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
extern unsigned int omap24xx_cpu_suspend_sz;
/* 3xxx */
-extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
+extern void omap34xx_cpu_suspend(int save_state);
/* omap3_do_wfi function pointer and size, for copy to SRAM */
extern void omap3_do_wfi(void);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index e1c79bae7670..7238a63e24e2 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -306,9 +306,24 @@ static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
return IRQ_HANDLED;
}
+static void omap34xx_save_context(u32 *save)
+{
+ u32 val;
+
+ /* Read Auxiliary Control Register */
+ asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (val));
+ *save++ = 1;
+ *save++ = val;
+
+ /* Read L2 AUX ctrl register */
+ asm("mrc p15, 1, %0, c9, c0, 2" : "=r" (val));
+ *save++ = 1;
+ *save++ = val;
+}
+
static void omap34xx_do_sram_idle(unsigned long save_state)
{
- omap34xx_cpu_suspend(omap3_arm_context, save_state);
+ omap34xx_cpu_suspend(save_state);
}
void omap_sram_idle(void)
@@ -408,6 +423,8 @@ void omap_sram_idle(void)
* get saved. The rest is placed on the stack, and restored
* from there before resuming.
*/
+ if (save_state)
+ omap34xx_save_context(omap3_arm_context);
if (save_state == 1 || save_state == 3)
cpu_suspend(save_state, omap34xx_do_sram_idle);
else
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 17dbc5af6915..f2ea1bd1c691 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -152,8 +152,7 @@ ENTRY(omap34xx_cpu_suspend)
stmfd sp!, {r4 - r11, lr} @ save registers on stack
/*
- * r0 contains CPU context save/restore pointer in sdram
- * r1 contains information about saving context:
+ * r0 contains information about saving context:
* 0 - No context lost
* 1 - Only L1 and logic lost
* 2 - Only L2 lost (Even L1 is retained we clean it along with L2)
@@ -166,19 +165,12 @@ ENTRY(omap34xx_cpu_suspend)
*/
ldr r4, omap3_do_wfi_sram_addr
ldr r5, [r4]
- cmp r1, #0x0 @ If no context save required,
+ cmp r0, #0x0 @ If no context save required,
bxeq r5 @ jump to the WFI code in SRAM
/* Otherwise fall through to the save context code */
save_context_wfi:
- mov r8, r0 @ Store SDRAM address in r8
- mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register
- mov r4, #0x1 @ Number of parameters for restore call
- stmia r8!, {r4-r5} @ Push parameters for restore call
- mrc p15, 1, r5, c9, c0, 2 @ Read L2 AUX ctrl register
- stmia r8!, {r4-r5} @ Push parameters for restore call
-
/*
* jump out to kernel flush routine
* - reuse that code is better