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authorChristian Hemp <c.hemp@phytec.de>2014-11-14 14:32:25 +0100
committerAlex Shi <alex.shi@linaro.org>2015-11-13 14:02:36 +0800
commit9afac10293cca9787d9a425d306d8c4dd9208d70 (patch)
treeed2b92ca242aa4183ac15c2e8dd7557846c9b99f
parentcc075ff3fe3416af416b86b7925fb0dfbb1309fa (diff)
ARM: dts: imx6: phyFLEX: Add PCIe
Add PCIe support for Phytec phyFLEX-i.MX6 (PFL-A-02 and PBA-B-01). Signed-off-by: Christian Hemp <c.hemp@phytec.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> (cherry picked from commit 9924546b29f5f20d0596ebc76ab1ddc1f716cae4) Signed-off-by: Alex Shi <alex.shi@linaro.org>
-rw-r--r--arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi4
-rw-r--r--arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi11
2 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
index 111b1f5021b9..7634cc1c9436 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
@@ -144,6 +144,10 @@
status = "okay";
};
+&pcie {
+ status = "okay";
+};
+
&ssi2 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index dc412f6640ea..46d512cee394 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -285,6 +285,10 @@
>;
};
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x80000000>;
+ };
+
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
@@ -355,6 +359,13 @@
};
};
+&pcie {
+ pinctrl-name = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio4 17 0>;
+ status = "disabled";
+};
+
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;