diff options
| author | Felipe Balbi <balbi@ti.com> | 2014-02-25 14:08:51 -0600 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2014-12-10 12:43:48 +0000 |
| commit | ad0e01151c614070518547085511cc06b1c19ba3 (patch) | |
| tree | 63acb13a0b45b1865af966260854bc26aa66a1c0 | |
| parent | 7752b9c7dd46743846ee2f3522baa9350fe8d1e4 (diff) | |
usb: dwc3: core: define bit 10 of GCTL register
This bit is necessary for implemeting workaround
for known issue with some revisions of this core.
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit fc483fd2a19d7ff97e677cc8e8f8d3990bbf381c)
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | drivers/usb/dwc3/core.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 01ec7d75292e..9c1e1d9d6818 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -159,6 +159,7 @@ #define DWC3_GCTL_PRTCAP_OTG 3 #define DWC3_GCTL_CORESOFTRESET (1 << 11) +#define DWC3_GCTL_SOFITPSYNC (1 << 10) #define DWC3_GCTL_SCALEDOWN(n) ((n) << 4) #define DWC3_GCTL_SCALEDOWN_MASK DWC3_GCTL_SCALEDOWN(3) #define DWC3_GCTL_DISSCRAMBLE (1 << 3) |