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authorCatalin Marinas <catalin.marinas@arm.com>2014-04-25 16:39:49 +0100
committerMark Brown <broonie@linaro.org>2014-08-11 21:43:44 +0100
commit4cbee8fc67bacf3e34a85e5c045716a744a57abd (patch)
tree0ea6faf8aef7c7601fd836da20e53d38ee5ee7ce
parent7cd371cbc49a56bf0e3e6757ef3b695546d58813 (diff)
arm64: Mark the Applied Micro X-Gene SATA controller as DMA coherent
Since the default DMA ops for arm64 are non-coherent, mark the X-Gene controller explicitly as dma-coherent to avoid additional cache maintenance. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Loc Ho <lho@apm.com> (cherry picked from commit 7a8d1ec16dfbb7785e82ccc97b0076cc34911701) Signed-off-by: Mark Brown <broonie@linaro.org> Conflicts: Documentation/devicetree/bindings/ata/apm-xgene.txt
-rw-r--r--arch/arm64/boot/dts/apm-storm.dtsi3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/apm-storm.dtsi b/arch/arm64/boot/dts/apm-storm.dtsi
index 93f4b2dd9248..f8c40a66e65d 100644
--- a/arch/arm64/boot/dts/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm-storm.dtsi
@@ -307,6 +307,7 @@
<0x0 0x1f21e000 0x0 0x1000>,
<0x0 0x1f217000 0x0 0x1000>;
interrupts = <0x0 0x86 0x4>;
+ dma-coherent;
status = "disabled";
clocks = <&sata01clk 0>;
phys = <&phy1 0>;
@@ -321,6 +322,7 @@
<0x0 0x1f22e000 0x0 0x1000>,
<0x0 0x1f227000 0x0 0x1000>;
interrupts = <0x0 0x87 0x4>;
+ dma-coherent;
status = "ok";
clocks = <&sata23clk 0>;
phys = <&phy2 0>;
@@ -334,6 +336,7 @@
<0x0 0x1f23d000 0x0 0x1000>,
<0x0 0x1f23e000 0x0 0x1000>;
interrupts = <0x0 0x88 0x4>;
+ dma-coherent;
status = "ok";
clocks = <&sata45clk 0>;
phys = <&phy3 0>;