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authorVictor Kamensky <victor.kamensky@linaro.org>2013-10-07 08:48:23 -0700
committerVictor Kamensky <victor.kamensky@linaro.org>2014-03-13 14:49:52 -0700
commitb0e8afd6ffd73719ad05dfbcfd0e0a6ec674b0c2 (patch)
treeaf4dc6f48e8b43d7b8f4cd241a4b18aa64382fde
parentf00f697ba020680765d95e0587e1dbf3ed9ed9f3 (diff)
downloadlinux-linaro-stable-b0e8afd6ffd73719ad05dfbcfd0e0a6ec674b0c2.tar.gz
ARM: tlb: ASID macro should give 32bit result for BE correct operation
In order for ASID macro to be used as expression passed to inline asm as 'r' operand it needs to give 32 bit unsigned result, not unsigned 64bit expression. Otherwise when 64bit ASID is passed to inline assembler statement as 'r' operand (32bit) compiler behavior is not well specified. For example when __flush_tlb_mm function compiled in big endian case, and ASID is passed to tlb_op macro directly, 0 will be passed as 'mcr 15, 0, r4, cr8, cr3, {2}' argument in r4, unless ASID macro changed to produce 32 bit result. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> (cherry picked from commit a1af3474487cc3b8731b990dceac6b6aad7f3ed8) Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
-rw-r--r--arch/arm/include/asm/mmu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h
index 6f18da09668b..64fd15159b7d 100644
--- a/arch/arm/include/asm/mmu.h
+++ b/arch/arm/include/asm/mmu.h
@@ -16,7 +16,7 @@ typedef struct {
#ifdef CONFIG_CPU_HAS_ASID
#define ASID_BITS 8
#define ASID_MASK ((~0ULL) << ASID_BITS)
-#define ASID(mm) ((mm)->context.id.counter & ~ASID_MASK)
+#define ASID(mm) ((unsigned int)((mm)->context.id.counter & ~ASID_MASK))
#else
#define ASID(mm) (0)
#endif