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authorCarolyn Wyborny <carolyn.wyborny@intel.com>2011-06-25 13:18:12 +0000
committerPaul Gortmaker <paul.gortmaker@windriver.com>2012-05-17 11:21:36 -0400
commit187979ee305a6ac1939daeb90e6446182f5e1617 (patch)
tree24cb0f8ff2050c0f6c3c108810f8d19e52c37bb5
parent0b55eccde1145e8e2b31fe855cdba3987676beb8 (diff)
downloadlinux-linaro-stable-187979ee305a6ac1939daeb90e6446182f5e1617.tar.gz
igb: Fix lack of flush after register write and before delay
commit 064b43304ed8ede8e13ff7b4338d09fd37bcffb1 upstream. Register writes followed by a delay are required to have a flush before the delay in order to commit the values to the register. Without the flush, the code following the delay may not function correctly. Reported-by: Tong Ho <tong.ho@ericsson.com> Reported-by: Guenter Roeck <guenter.roeck@ericsson.com> Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
-rw-r--r--drivers/net/igb/e1000_82575.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c
index 4a32bed77c71..a6ea91d38124 100644
--- a/drivers/net/igb/e1000_82575.c
+++ b/drivers/net/igb/e1000_82575.c
@@ -1554,6 +1554,7 @@ static s32 igb_reset_hw_82580(struct e1000_hw *hw)
ctrl |= E1000_CTRL_RST;
wr32(E1000_CTRL, ctrl);
+ wrfl();
/* Add delay to insure DEV_RST has time to complete */
if (global_device_reset)