diff options
author | Matthew Leach <matthew.leach@arm.com> | 2013-09-25 16:33:13 +0100 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2014-07-25 12:46:53 +0100 |
commit | e69503831c2f0d7782c0aaa521c3e4d52ea2ae57 (patch) | |
tree | 019e303f404e3dd6c59289841d78c2768c2b28c9 | |
parent | 20f2b5cafcd9af698faa789daccc55c7062dcc68 (diff) |
arm64: use correct register width when retrieving ASID
The ASID is represented as an unsigned int in mm_context_t and we
currently use the mmid assembler macro to access this element of the
struct. This should be accessed with a register of 32-bit width. If
the incorrect register width is used the ASID will be returned in
bits[32:63] of the register when running under big-endian.
Fix a use of the mmid macro in tlb.S to use a 32-bit access.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Matthew Leach <matthew.leach@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
(cherry picked from commit fc18047c732f6becba92618a397555927687efd3)
Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r-- | arch/arm64/mm/tlb.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/mm/tlb.S b/arch/arm64/mm/tlb.S index 8ae80a18e8ec..19da91e0cd27 100644 --- a/arch/arm64/mm/tlb.S +++ b/arch/arm64/mm/tlb.S @@ -35,7 +35,7 @@ */ ENTRY(__cpu_flush_user_tlb_range) vma_vm_mm x3, x2 // get vma->vm_mm - mmid x3, x3 // get vm_mm->context.id + mmid w3, x3 // get vm_mm->context.id dsb sy lsr x0, x0, #12 // align address lsr x1, x1, #12 |