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authorTom St Denis <tom.stdenis@amd.com>2016-10-13 12:38:07 -0400
committerSasha Levin <alexander.levin@verizon.com>2016-11-23 22:57:08 -0500
commit2b5408a089d9f8672f89e90f77bc3f958c7263b5 (patch)
tree0bdd70594d258958ba038941e6e595b96f47d291
parent2c21744a274cb04817ce35c1ae13aa49d3246ca5 (diff)
drm/radeon/si_dpm: Limit clocks on HD86xx part
[ Upstream commit fb9a5b0c1c9893db2e0d18544fd49e19d784a87d ] Limit clocks on a specific HD86xx part to avoid crashes (while awaiting an appropriate PP fix). Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
-rw-r--r--drivers/gpu/drm/radeon/si_dpm.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index d5d2c6f92036..2e1c46aa49b7 100644
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -2967,6 +2967,12 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
max_sclk = 75000;
max_mclk = 80000;
}
+ /* limit clocks on HD8600 series */
+ if (rdev->pdev->device == 0x6660 &&
+ rdev->pdev->revision == 0x83) {
+ max_sclk = 75000;
+ max_mclk = 80000;
+ }
if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
ni_dpm_vblank_too_short(rdev))