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authorHarvey Hunt <harvey.hunt@imgtec.com>2016-02-24 15:16:43 +0000
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-03-09 15:31:54 -0800
commitf105a72e6e71244643bc0a5dc44bfab1fe3d76f9 (patch)
tree6ade022f2420c1d619f8eae88615eab51ea3922c
parent45eb9d85bdfc2f6737644386c209640b3c6d2165 (diff)
downloadlinux-linaro-stable-f105a72e6e71244643bc0a5dc44bfab1fe3d76f9.tar.gz
libata: Align ata_device's id on a cacheline
commit 4ee34ea3a12396f35b26d90a094c75db95080baa upstream. The id buffer in ata_device is a DMA target, but it isn't explicitly cacheline aligned. Due to this, adjacent fields can be overwritten with stale data from memory on non coherent architectures. As a result, the kernel is sometimes unable to communicate with an ATA device. Fix this by ensuring that the id buffer is cacheline aligned. This issue is similar to that fixed by Commit 84bda12af31f ("libata: align ap->sector_buf"). Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Cc: linux-kernel@vger.kernel.org Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--include/linux/libata.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 8ad0771b88ab..8017e5c459cf 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -666,7 +666,7 @@ struct ata_device {
union {
u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
u32 gscr[SATA_PMP_GSCR_DWORDS]; /* PMP GSCR block */
- };
+ } ____cacheline_aligned;
/* DEVSLP Timing Variables from Identify Device Data Log */
u8 devslp_timing[ATA_LOG_DEVSLP_SIZE];