diff options
Diffstat (limited to 'arch/metag/include')
| -rw-r--r-- | arch/metag/include/asm/metag_mem.h | 3 | ||||
| -rw-r--r-- | arch/metag/include/asm/thread_info.h | 2 | ||||
| -rw-r--r-- | arch/metag/include/uapi/asm/Kbuild | 1 | ||||
| -rw-r--r-- | arch/metag/include/uapi/asm/ech.h | 15 |
4 files changed, 19 insertions, 2 deletions
diff --git a/arch/metag/include/asm/metag_mem.h b/arch/metag/include/asm/metag_mem.h index 3f7b54d8cca..aa5a076df43 100644 --- a/arch/metag/include/asm/metag_mem.h +++ b/arch/metag/include/asm/metag_mem.h @@ -700,6 +700,9 @@ #define SYSC_xCPARTG_AND_S 8 #define SYSC_xCPARTL_OR_BITS 0x000F0000 /* Ors into top 4 bits */ #define SYSC_xCPARTL_OR_S 16 +#ifdef METAC_2_1 +#define SYSC_DCPART_GCON_BIT 0x00100000 /* Coherent shared local */ +#endif /* METAC_2_1 */ #define SYSC_xCPARTG_OR_BITS 0x0F000000 /* Ors into top 4 bits */ #define SYSC_xCPARTG_OR_S 24 #define SYSC_CWRMODE_BIT 0x80000000 /* Write cache mode bit */ diff --git a/arch/metag/include/asm/thread_info.h b/arch/metag/include/asm/thread_info.h index 0ecd34d8b5f..7c4a3300614 100644 --- a/arch/metag/include/asm/thread_info.h +++ b/arch/metag/include/asm/thread_info.h @@ -150,6 +150,4 @@ static inline int kstack_end(void *addr) #define _TIF_WORK_MASK (_TIF_ALLWORK_MASK & ~(_TIF_SYSCALL_TRACE | \ _TIF_SYSCALL_AUDIT | _TIF_SINGLESTEP)) -#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG) - #endif /* _ASM_THREAD_INFO_H */ diff --git a/arch/metag/include/uapi/asm/Kbuild b/arch/metag/include/uapi/asm/Kbuild index 876c71f866d..84e09feb4d5 100644 --- a/arch/metag/include/uapi/asm/Kbuild +++ b/arch/metag/include/uapi/asm/Kbuild @@ -2,6 +2,7 @@ include include/uapi/asm-generic/Kbuild.asm header-y += byteorder.h +header-y += ech.h header-y += ptrace.h header-y += resource.h header-y += sigcontext.h diff --git a/arch/metag/include/uapi/asm/ech.h b/arch/metag/include/uapi/asm/ech.h new file mode 100644 index 00000000000..ac94d1cf9be --- /dev/null +++ b/arch/metag/include/uapi/asm/ech.h @@ -0,0 +1,15 @@ +#ifndef _UAPI_METAG_ECH_H +#define _UAPI_METAG_ECH_H + +/* + * These bits can be set in the top half of the D0.8 register when DSP context + * switching is enabled, in order to support partial DSP context save/restore. + */ + +#define TBICTX_XEXT_BIT 0x1000 /* Enable extended context save */ +#define TBICTX_XTDP_BIT 0x0800 /* DSP accumulators/RAM/templates */ +#define TBICTX_XHL2_BIT 0x0400 /* Hardware loops */ +#define TBICTX_XAXX_BIT 0x0200 /* Extended AX registers (A*.4-7) */ +#define TBICTX_XDX8_BIT 0x0100 /* Extended DX registers (D*.8-15) */ + +#endif /* _UAPI_METAG_ECH_H */ |