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authorAl Viro <viro@ftp.linux.org.uk>2007-02-09 16:38:15 +0000
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-02-09 09:14:06 -0800
commit9340b0d356ee52783121af398fa6a332e19e37e2 (patch)
tree9f6f06adbd7e583fa50723703797dd1cd15fe4f8 /arch
parentccbebdaccf53ef21663d3bde0ab7b3806d0aeb94 (diff)
downloadlinaro-lsk-9340b0d356ee52783121af398fa6a332e19e37e2.tar.gz
[PATCH] arch/powerpc trivial annotations
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/platforms/cell/iommu.c5
-rw-r--r--arch/powerpc/platforms/chrp/setup.c4
-rw-r--r--arch/powerpc/xmon/spu-dis.c2
3 files changed, 6 insertions, 5 deletions
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index b43466ba809..67d617b60a2 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -149,7 +149,8 @@ static int cbe_nr_iommus;
static void invalidate_tce_cache(struct cbe_iommu *iommu, unsigned long *pte,
long n_ptes)
{
- unsigned long *reg, val;
+ unsigned long __iomem *reg;
+ unsigned long val;
long n;
reg = iommu->xlate_regs + IOC_IOPT_CacheInvd;
@@ -592,7 +593,7 @@ static void __init cell_iommu_init_one(struct device_node *np, unsigned long off
/* Init base fields */
i = cbe_nr_iommus++;
iommu = &iommus[i];
- iommu->stab = 0;
+ iommu->stab = NULL;
iommu->nid = nid;
snprintf(iommu->name, sizeof(iommu->name), "iommu%d", i);
INIT_LIST_HEAD(&iommu->windows);
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index e1f51d45598..117c9a0055b 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -75,7 +75,7 @@ extern irqreturn_t xmon_irq(int, void *);
extern unsigned long loops_per_jiffy;
/* To be replaced by RTAS when available */
-static unsigned int *briq_SPOR;
+static unsigned int __iomem *briq_SPOR;
#ifdef CONFIG_SMP
extern struct smp_ops_t chrp_smp_ops;
@@ -267,7 +267,7 @@ void __init chrp_setup_arch(void)
} else if (machine && strncmp(machine, "TotalImpact,BRIQ-1", 18) == 0) {
_chrp_type = _CHRP_briq;
/* Map the SPOR register on briq and change the restart hook */
- briq_SPOR = (unsigned int *)ioremap(0xff0000e8, 4);
+ briq_SPOR = ioremap(0xff0000e8, 4);
ppc_md.restart = briq_restart;
} else {
/* Let's assume it is an IBM chrp if all else fails */
diff --git a/arch/powerpc/xmon/spu-dis.c b/arch/powerpc/xmon/spu-dis.c
index ee929c641bf..e5f89837c82 100644
--- a/arch/powerpc/xmon/spu-dis.c
+++ b/arch/powerpc/xmon/spu-dis.c
@@ -85,7 +85,7 @@ get_index_for_opcode (unsigned int insn)
if ((index = spu_disassemble_table[opcode & 0x7ff]) != 0)
return index;
- return 0;
+ return NULL;
}
/* Print a Spu instruction. */