diff options
| author | Amit Daniel Kachhap <amit.kachhap@linaro.org> | 2012-01-10 10:49:19 +0530 |
|---|---|---|
| committer | Andrey Konovalov <andrey.konovalov@linaro.org> | 2012-01-11 21:56:48 +0400 |
| commit | 29a443b2f2b0d3eb5d9b81e5d7eb495a237fbce4 (patch) | |
| tree | c5435c8feff30d6bc68e5638efc2f7ff27082774 /arch | |
| parent | 0e751a7fd1547a24aaee058e034074b3aea5854c (diff) | |
ARM: exynos: Enable l2 configuration through device tree
This patch enables calling generic l2 setup functions if device tree is used.
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@linaro.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-exynos/cpu.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm/mach-exynos/cpu.c b/arch/arm/mach-exynos/cpu.c index 68e50d51101..2679d1eb78f 100644 --- a/arch/arm/mach-exynos/cpu.c +++ b/arch/arm/mach-exynos/cpu.c @@ -36,6 +36,9 @@ #include <mach/regs-irq.h> #include <mach/regs-pmu.h> +#define L2_AUX_VAL 0x7C470001 +#define L2_AUX_MASK 0xC200ffff + extern int combiner_init(unsigned int combiner_nr, void __iomem *base, unsigned int irq_start); extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); @@ -243,6 +246,15 @@ core_initcall(exynos4_core_init); #ifdef CONFIG_CACHE_L2X0 static int __init exynos4_l2x0_cache_init(void) { +#ifdef CONFIG_OF + int ret; + ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK); + if (!ret) { + l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); + clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long)); + return 0; + } +#endif if (!(__raw_readl(S5P_VA_L2CC + L2X0_CTRL) & 0x1)) { l2x0_saved_regs.phy_base = EXYNOS4_PA_L2CC; /* TAG, Data Latency Control: 2 cycles */ @@ -276,7 +288,7 @@ static int __init exynos4_l2x0_cache_init(void) clean_dcache_area(&l2x0_saved_regs, sizeof(struct l2x0_regs)); } - l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff); + l2x0_init(S5P_VA_L2CC, L2_AUX_VAL, L2_AUX_MASK); return 0; } |