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authorHuang Ying <ying.huang@intel.com>2009-07-31 09:41:41 +0800
committerH. Peter Anvin <hpa@zytor.com>2009-08-10 13:58:41 -0700
commit0dcc66851f1091af421416c28a9458836885f522 (patch)
tree7dd11e406c501068a50d5e3f1fc272262445c519 /arch/x86/include/asm/mce.h
parent5b7e88edc6193f36941bccbfd5ed9ed5fe27d2e1 (diff)
x86, mce: Support specifying raise mode for software MCE injection
Raise mode include raising as exception or raising as poll, it is specified via the mce.inject_flags field. This can be used to specify raise mode of UCNA, which is UC error but raised not as exception. And this can be used to test the filter code of poll handler or exception handler too. For example, enforce a poll raise mode for a fatal MCE. ChangeLog: v2: - Re-base on latest x86-tip.git/mce3 Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/include/asm/mce.h')
-rw-r--r--arch/x86/include/asm/mce.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 8945be9ad2b..b608a64c581 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -44,6 +44,7 @@
#define MCJ_CTX_PROCESS 1 /* inject context: process */
#define MCJ_CTX_IRQ 2 /* inject context: IRQ */
#define MCJ_NMI_BROADCAST 4 /* do NMI broadcasting */
+#define MCJ_EXCEPTION 8 /* raise as exception */
/* Fields are zero when not available */
struct mce {