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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-03-01 15:46:09 +1100
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-04-20 11:03:24 +1000
commitb144871cb5f2c268e94258ae8f1ec810db2e1120 (patch)
treec29295c70bccde6487992fe5c4c8bac87bd4e867 /arch/powerpc
parent895796a8ab548fe03b6fea410dcb1b86e1913708 (diff)
powerpc: Initialize TLB and LPID register on HV mode Power7
In case entry from the bootloader isn't "clean" Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/kernel/cpu_setup_power7.S18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_power7.S b/arch/powerpc/kernel/cpu_setup_power7.S
index 2390f6f7c47..4f9a93fcfe0 100644
--- a/arch/powerpc/kernel/cpu_setup_power7.S
+++ b/arch/powerpc/kernel/cpu_setup_power7.S
@@ -25,7 +25,10 @@ _GLOBAL(__setup_cpu_power7)
bl __init_hvmode_206
mtlr r11
beqlr
+ li r0,0
+ mtspr SPRN_LPID,r0
bl __init_LPCR
+ bl __init_TLB
mtlr r11
blr
@@ -34,7 +37,10 @@ _GLOBAL(__restore_cpu_power7)
mfmsr r3
rldicl. r0,r3,4,63
beqlr
+ li r0,0
+ mtspr SPRN_LPID,r0
bl __init_LPCR
+ bl __init_TLB
mtlr r11
blr
@@ -71,3 +77,15 @@ __init_LPCR:
mtspr SPRN_LPCR,r3
isync
blr
+
+__init_TLB:
+ /* Clear the TLB */
+ li r6,128
+ mtctr r6
+ li r7,0xc00 /* IS field = 0b11 */
+ ptesync
+2: tlbiel r7
+ addi r7,r7,0x1000
+ bdnz 2b
+ ptesync
+1: blr