path: root/arch/powerpc/platforms
diff options
authorTseng-Hui (Frank) Lin <thlin@linux.vnet.ibm.com>2011-05-02 20:43:04 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-05-04 15:19:26 +1000
commit851d2e2fe8dbcbe3afcad6fc4569c881d8ad4ce9 (patch)
tree94082e7751a66236febed1cf18a1f01a02084ae9 /arch/powerpc/platforms
parenta32e252f7cdfb3675a4e50215cfac356ed8952c4 (diff)
powerpc: Add Initiate Coprocessor Store Word (icswx) support
Icswx is a PowerPC instruction to send data to a co-processor. On Book-S processors the LPAR_ID and process ID (PID) of the owning process are registered in the window context of the co-processor at initialization time. When the icswx instruction is executed the L2 generates a cop-reg transaction on PowerBus. The transaction has no address and the processor does not perform an MMU access to authenticate the transaction. The co-processor compares the LPAR_ID and the PID included in the transaction and the LPAR_ID and PID held in the window context to determine if the process is authorized to generate the transaction. The OS needs to assign a 16-bit PID for the process. This cop-PID needs to be updated during context switch. The cop-PID needs to be destroyed when the context is destroyed. Signed-off-by: Sonny Rao <sonnyrao@linux.vnet.ibm.com> Signed-off-by: Tseng-Hui (Frank) Lin <thlin@linux.vnet.ibm.com> Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms')
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 7c1e1c64437..a1e623822a3 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -230,6 +230,24 @@ config VSX
If in doubt, say Y here.
+config PPC_ICSWX
+ bool "Support for PowerPC icswx coprocessor instruction"
+ depends on POWER4
+ default n
+ ---help---
+ This option enables kernel support for the PowerPC Initiate
+ Coprocessor Store Word (icswx) coprocessor instruction on POWER7
+ or newer processors.
+ This option is only useful if you have a processor that supports
+ the icswx coprocessor instruction. It does not have any effect
+ on processors without the icswx coprocessor instruction.
+ This option slightly increases kernel memory usage.
+ If in doubt, say N here.
config SPE
bool "SPE Support"
depends on E200 || (E500 && !PPC_E500MC)