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authorJeremy Kerr <jk@ozlabs.org>2007-12-20 16:39:59 +0900
committerPaul Mackerras <paulus@samba.org>2007-12-21 19:46:19 +1100
commitc40aa4710479b5d9f0e1fdf71b151f4c3708e3eb (patch)
tree17d45695fdbe5cf9f31a3185ddd9847c68324d95 /arch/powerpc/platforms/cell/spufs
parentcc210b3ec5e4d9c690549e07aa5853e8de8dbff9 (diff)
[POWERPC] spufs: fix incorrect interrupt status clearing in backing mbox stat poll
When doing a poll on the mbox stat file of a swapped-out context, we clear the class 0 interrupt status, rather than the class 2 interrupt status. This change corrects the poll operation to clear the correct interrupt. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/cell/spufs')
-rw-r--r--arch/powerpc/platforms/cell/spufs/backing_ops.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/platforms/cell/spufs/backing_ops.c b/arch/powerpc/platforms/cell/spufs/backing_ops.c
index 15f91581371..97b2d5e587c 100644
--- a/arch/powerpc/platforms/cell/spufs/backing_ops.c
+++ b/arch/powerpc/platforms/cell/spufs/backing_ops.c
@@ -106,7 +106,7 @@ static unsigned int spu_backing_mbox_stat_poll(struct spu_context *ctx,
if (stat & 0xff0000)
ret |= POLLIN | POLLRDNORM;
else {
- ctx->csa.priv1.int_stat_class0_RW &= ~0x1;
+ ctx->csa.priv1.int_stat_class2_RW &= ~0x1;
ctx->csa.priv1.int_mask_class2_RW |= 0x1;
}
}
@@ -114,7 +114,7 @@ static unsigned int spu_backing_mbox_stat_poll(struct spu_context *ctx,
if (stat & 0x00ff00)
ret = POLLOUT | POLLWRNORM;
else {
- ctx->csa.priv1.int_stat_class0_RW &= ~0x10;
+ ctx->csa.priv1.int_stat_class2_RW &= ~0x10;
ctx->csa.priv1.int_mask_class2_RW |= 0x10;
}
}