aboutsummaryrefslogtreecommitdiff
path: root/arch/powerpc/include/asm/mmu.h
diff options
context:
space:
mode:
authorMichael Neuling <mikey@neuling.org>2011-04-06 18:23:29 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-05-04 15:19:26 +1000
commita32e252f7cdfb3675a4e50215cfac356ed8952c4 (patch)
tree6ed462115dc518d39707f9c00ef19cad5acd1fc8 /arch/powerpc/include/asm/mmu.h
parent476eb4912601a8c01e6702b9a029f476b4b131d2 (diff)
downloadlinaro-lsk-a32e252f7cdfb3675a4e50215cfac356ed8952c4.tar.gz
powerpc: Use new CPU feature bit to select 2.06 tlbie
This removes MMU_FTR_TLBIE_206 as we can now use CPU_FTR_HVMODE_206. It also changes the logic to select which tlbie to use to be based on this new CPU feature bit. This also duplicates the ASM_FTR_IF/SET/CLR defines for CPU features (copied from MMU features). Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/mmu.h')
-rw-r--r--arch/powerpc/include/asm/mmu.h8
1 files changed, 1 insertions, 7 deletions
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index a39304b74f8..4138b21ae80 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -56,11 +56,6 @@
*/
#define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000)
-/* This indicates that the processor uses the ISA 2.06 server tlbie
- * mnemonics
- */
-#define MMU_FTR_TLBIE_206 ASM_CONST(0x00400000)
-
/* Enable use of TLB reservation. Processor should support tlbsrx.
* instruction and MAS0[WQ].
*/
@@ -105,8 +100,7 @@
#define MMU_FTRS_PPC970 MMU_FTRS_POWER4
#define MMU_FTRS_POWER5 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE
#define MMU_FTRS_POWER6 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE
-#define MMU_FTRS_POWER7 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | \
- MMU_FTR_TLBIE_206
+#define MMU_FTRS_POWER7 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE
#define MMU_FTRS_CELL MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
MMU_FTR_CI_LARGE_PAGE
#define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \