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authorShaohui Xie <Shaohui.Xie@freescale.com>2012-07-17 15:18:31 +0800
committerKumar Gala <galak@kernel.crashing.org>2012-07-26 08:09:53 -0500
commite1bd5d8bc13f51c7c991f04255b3868e31933252 (patch)
tree6d865cb7ebea4bd182812fbaf61011a34d3535b5 /arch/powerpc/boot
parent771e6089e3638ea1e06700a9dc4660cd678e35bb (diff)
downloadlinaro-lsk-e1bd5d8bc13f51c7c991f04255b3868e31933252.tar.gz
powerpc/85xx: P3041DS - change espi input-clock from 40MHz to 35MHz
Default CoreNet Coherency Bus (CCB) frequency on P3041 is 750MHz, but espi cannot work at 40MHz with this CCB frequency, so we need to slow down the clock rate of espi to 35MHz to make it work stable at the CCB frequency. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/p3041ds.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/boot/dts/p3041ds.dts b/arch/powerpc/boot/dts/p3041ds.dts
index 22a215e9416..6cdcadc80c3 100644
--- a/arch/powerpc/boot/dts/p3041ds.dts
+++ b/arch/powerpc/boot/dts/p3041ds.dts
@@ -58,7 +58,7 @@
#size-cells = <1>;
compatible = "spansion,s25sl12801";
reg = <0>;
- spi-max-frequency = <40000000>; /* input clock */
+ spi-max-frequency = <35000000>; /* input clock */
partition@u-boot {
label = "u-boot";
reg = <0x00000000 0x00100000>;