path: root/arch/m32r/include/asm/types.h
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authorCliff Wickman <cpw@sgi.com>2009-04-16 07:53:09 -0500
committerIngo Molnar <mingo@elte.hu>2009-04-16 19:44:16 +0200
commit4ea3c51d5bd3bb4eea7d7d3a1f80d1a48c2a6f92 (patch)
tree025c060c7733bfc72a0614a60f745296070def69 /arch/m32r/include/asm/types.h
parent94ca8e4852807fc42d2f64fcaf248aafc4f2e6a7 (diff)
x86: UV BAU distribution and payload MMRs
This patch correctly sets BAU memory mapped registers to point to the sending activation descriptor table and target payload table. The "Broadcast Assist Unit" is used for TLB shootdown in UV. The memory mapped registers that point to sending and receiving memory structures contain node numbers. In one case the __pa() function did not provide the node id of memory on blade zero in configurations where that id is nonzero. In another case, it was assumed that memory was allocated on the local node. That assumption is not true in a configuration in which the node has no memory. Tested on the UV hardware simulator. [ Impact: fix possible runtime crash due to incorrect TLB logic ] Signed-off-by: Cliff Wickman <cpw@sgi.com> LKML-Reference: <E1LuR5Z-0007An-B8@eag09.americas.sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/m32r/include/asm/types.h')
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