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| author | Mark Brown <broonie@linaro.org> | 2013-07-22 11:16:31 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@linaro.org> | 2013-07-22 11:16:31 +0100 |
| commit | c04ee7fcbfba1471af90cf6407370efc779c1243 (patch) | |
| tree | c0c37c40beb8bd197b7f424a67f12487960c4882 /Documentation | |
| parent | e0749524b57019f480ad6c581431589d053e0cb0 (diff) | |
| parent | 0f4a56e16d5fc9028b62ba529177a3109513e111 (diff) | |
Merge tag 'v3.10.2' into linux-linaro-lsklsk
This is the 3.10.2 stable release
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/parisc/registers | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/Documentation/parisc/registers b/Documentation/parisc/registers index dd3caddd1ad..10c7d1730f5 100644 --- a/Documentation/parisc/registers +++ b/Documentation/parisc/registers @@ -78,6 +78,14 @@ Shadow Registers used by interruption handler code TOC enable bit 1 ========================================================================= + +The PA-RISC architecture defines 7 registers as "shadow registers". +Those are used in RETURN FROM INTERRUPTION AND RESTORE instruction to reduce +the state save and restore time by eliminating the need for general register +(GR) saves and restores in interruption handlers. +Shadow registers are the GRs 1, 8, 9, 16, 17, 24, and 25. + +========================================================================= Register usage notes, originally from John Marvin, with some additional notes from Randolph Chung. |