diff options
| author | Rahul Sharma <rahul.sharma@samsung.com> | 2013-07-25 10:37:35 +0530 |
|---|---|---|
| committer | Show Liu <show.liu@linaro.org> | 2014-04-28 11:37:10 +0800 |
| commit | d41501ee30d30150e737d25a5cce041d9376ed73 (patch) | |
| tree | 466358be10dd8c23a5f79096192b761c0de92376 | |
| parent | 6f03be1975902f9e4ca41a6ec7074426dfa02554 (diff) | |
clk/exynos5250: add sclk_hdmiphy in the list of special clocks
hdmi driver needs hdmiphy clock which is one of the parent
for hdmi mux clock. This is required while changing the parent
of mux clock.
Upstream commit ID: b38a5040a66d
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/clock/exynos5250-clock.txt | 1 | ||||
| -rw-r--r-- | drivers/clk/samsung/clk-exynos5250.c | 5 |
2 files changed, 4 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt index b3371479c12..f333d619365 100644 --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt @@ -59,6 +59,7 @@ clock which they consume. sclk_spi0 154 sclk_spi1 155 sclk_spi2 156 + sclk_hdmiphy 157 [Peripheral Clock Gates] diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 87cccdf20b2..3b7dc49ad48 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -87,6 +87,7 @@ enum exynos5250_clks { sclk_mmc0, sclk_mmc1, sclk_mmc2, sclk_mmc3, sclk_sata, sclk_usb3, sclk_jpeg, sclk_uart0, sclk_uart1, sclk_uart2, sclk_uart3, sclk_pwm, sclk_audio1, sclk_audio2, sclk_spdif, sclk_spi0, sclk_spi1, sclk_spi2, + sclk_hdmiphy, /* gate clocks */ gscl0 = 256, gscl1, gscl2, gscl3, gscl_wa, gscl_wb, smmu_gscl0, @@ -198,8 +199,8 @@ struct samsung_fixed_rate_clock exynos5250_fixed_rate_ext_clks[] __initdata = { }; /* fixed rate clocks generated inside the soc */ -struct samsung_fixed_rate_clock exynos5250_fixed_rate_clks[] __initdata = { - FRATE(none, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), +static struct samsung_fixed_rate_clock exynos5250_fixed_rate_clks[] __initdata = { + FRATE(sclk_hdmiphy, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_hdmi27m", NULL, CLK_IS_ROOT, 27000000), FRATE(none, "sclk_dptxphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_uhostphy", NULL, CLK_IS_ROOT, 48000000), |