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path: root/arch/mips/kernel/smp-mt.c
AgeCommit message (Expand)Author
2007-08-27[MIPS] SMP: Scatter __cpuinit over the code as needed.Ralf Baechle
2007-07-04[MIPS] VSMP: Fix initialization ordering bug.Ralf Baechle
2007-06-14[MIPS] Separate performance counter interruptsChris Dearman
2007-02-06[MIPS] Define MIPS_CPU_IRQ_BASE in generic headerAtsushi Nemoto
2006-11-30[MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irqAtsushi Nemoto
2006-10-31[MIPS] VSMP: Synchronize cp0 counters on bootup.Ralf Baechle
2006-10-31[MIPS] VSMP: Fix initialization ordering bug.Ralf Baechle
2006-10-08[MIPS] Complete fixes after removal of pt_regs argument to int handlers.Ralf Baechle
2006-09-27[MIPS] MT: Initialise all writable bits in Cause register to zero.Chris Dearman
2006-07-02[PATCH] irq-flags: MIPS: Use the new IRQF_ constantsThomas Gleixner
2006-04-19[MIPS] FPU affinity for MT ASE.Ralf Baechle
2006-04-19[MIPS] MT: Improved multithreading support.Ralf Baechle