aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/mach-at91/at91sam9g45.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-at91/at91sam9g45.c')
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c26
1 files changed, 23 insertions, 3 deletions
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 85166b7e69a..c67b47f1c0f 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -20,6 +20,7 @@
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>
#include <mach/at91_shdwc.h>
+#include <mach/cpu.h>
#include "generic.h"
#include "clock.h"
@@ -120,8 +121,8 @@ static struct clk ssc1_clk = {
.pmc_mask = 1 << AT91SAM9G45_ID_SSC1,
.type = CLK_TYPE_PERIPHERAL,
};
-static struct clk tcb_clk = {
- .name = "tcb_clk",
+static struct clk tcb0_clk = {
+ .name = "tcb0_clk",
.pmc_mask = 1 << AT91SAM9G45_ID_TCB,
.type = CLK_TYPE_PERIPHERAL,
};
@@ -176,6 +177,13 @@ static struct clk mmc1_clk = {
.type = CLK_TYPE_PERIPHERAL,
};
+/* Video decoder clock - Only for sam9m10/sam9m11 */
+static struct clk vdec_clk = {
+ .name = "vdec_clk",
+ .pmc_mask = 1 << AT91SAM9G45_ID_VDEC,
+ .type = CLK_TYPE_PERIPHERAL,
+};
+
/* One additional fake clock for ohci */
static struct clk ohci_clk = {
.name = "ohci_clk",
@@ -184,6 +192,14 @@ static struct clk ohci_clk = {
.parent = &uhphs_clk,
};
+/* One additional fake clock for second TC block */
+static struct clk tcb1_clk = {
+ .name = "tcb1_clk",
+ .pmc_mask = 0,
+ .type = CLK_TYPE_PERIPHERAL,
+ .parent = &tcb0_clk,
+};
+
static struct clk *periph_clocks[] __initdata = {
&pioA_clk,
&pioB_clk,
@@ -200,7 +216,7 @@ static struct clk *periph_clocks[] __initdata = {
&spi1_clk,
&ssc0_clk,
&ssc1_clk,
- &tcb_clk,
+ &tcb0_clk,
&pwm_clk,
&tsc_clk,
&dma_clk,
@@ -213,6 +229,7 @@ static struct clk *periph_clocks[] __initdata = {
&mmc1_clk,
// irq0
&ohci_clk,
+ &tcb1_clk,
};
/*
@@ -239,6 +256,9 @@ static void __init at91sam9g45_register_clocks(void)
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
+ if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11())
+ clk_register(&vdec_clk);
+
clk_register(&pck0);
clk_register(&pck1);
}