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authorSteve Hodgson <shodgson@solarflare.com>2010-04-28 09:27:36 +0000
committerDavid S. Miller <davem@davemloft.net>2010-04-28 12:44:32 -0700
commit6369545945b90daa1a73fca174da9194c398417c (patch)
tree1331418d5c6b547eed8154fedceed68585506aa5 /drivers/net/sfc/net_driver.h
parent00bbb4a5344a5f81cf5d48e781e5c0df3e588d17 (diff)
sfc: Handle serious errors in exactly one interrupt handler
'Fatal' errors set an interrupt flag associated with a specific event queue; only read the syndrome vector if we see that queue's flag set (legacy interrupts) or in the interrupt handler for that queue (MSI). Do not ignore an interrupt if the fatal error flag is set but specific error flags are all zero. Even if we don't schedule a reset, we must respect the queue mask and rearm the appropriate event queues. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sfc/net_driver.h')
-rw-r--r--drivers/net/sfc/net_driver.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/sfc/net_driver.h b/drivers/net/sfc/net_driver.h
index cb018e27209..70aea3af9ae 100644
--- a/drivers/net/sfc/net_driver.h
+++ b/drivers/net/sfc/net_driver.h
@@ -672,6 +672,7 @@ union efx_multicast_hash {
* This register is written with the SMP processor ID whenever an
* interrupt is handled. It is used by efx_nic_test_interrupt()
* to verify that an interrupt has occurred.
+ * @fatal_irq_level: IRQ level (bit number) used for serious errors
* @spi_flash: SPI flash device
* This field will be %NULL if no flash device is present (or for Siena).
* @spi_eeprom: SPI EEPROM device
@@ -756,6 +757,7 @@ struct efx_nic {
struct efx_buffer irq_status;
volatile signed int last_irq_cpu;
unsigned long irq_zero_count;
+ unsigned fatal_irq_level;
struct efx_spi_device *spi_flash;
struct efx_spi_device *spi_eeprom;