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authorPekka Enberg <penberg@cs.helsinki.fi>2009-04-09 11:52:25 +0300
committerIngo Molnar <mingo@elte.hu>2009-04-10 14:35:56 +0200
commit320fd99672a44ece6d1cd0d838ba31c8ebbf5979 (patch)
treed85fecc5d3d648f4a259a7dcefd1c07b96053806 /arch/x86/kernel/irqinit_32.c
parent598c73d250ffb112715aa48fb325d79e255be23b (diff)
downloadlinux-2.6.38-lt-ux500-320fd99672a44ece6d1cd0d838ba31c8ebbf5979.tar.gz
x86: unify native_init_IRQ() in irqinit_{32,64}.c
Impact: cleanup Reviewed-by Cyrill Gorcunov <gorcunov@openvz.org> Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/irqinit_32.c')
-rw-r--r--arch/x86/kernel/irqinit_32.c53
1 files changed, 34 insertions, 19 deletions
diff --git a/arch/x86/kernel/irqinit_32.c b/arch/x86/kernel/irqinit_32.c
index 4488b713396..a780de3ad5d 100644
--- a/arch/x86/kernel/irqinit_32.c
+++ b/arch/x86/kernel/irqinit_32.c
@@ -22,7 +22,7 @@
#include <asm/i8259.h>
#include <asm/traps.h>
-
+#ifdef CONFIG_X86_32
/*
* Note that on a 486, we don't want to do a SIGFPE on an irq13
* as the irq is unreliable, and exception 16 works correctly
@@ -52,6 +52,7 @@ static struct irqaction fpu_irq = {
.handler = math_error_irq,
.name = "fpu",
};
+#endif
/*
* IRQ2 is cascade interrupt to second interrupt controller
@@ -155,24 +156,6 @@ static void __init smp_intr_init(void)
#endif /* CONFIG_SMP */
}
-/**
- * x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors
- *
- * Description:
- * Perform any necessary interrupt initialisation prior to setting up
- * the "ordinary" interrupt call gates. For legacy reasons, the ISA
- * interrupts should be initialised here if the machine emulates a PC
- * in any way.
- **/
-static void __init x86_quirk_pre_intr_init(void)
-{
- if (x86_quirks->arch_pre_intr_init) {
- if (x86_quirks->arch_pre_intr_init())
- return;
- }
- init_ISA_irqs();
-}
-
static void __init apic_intr_init(void)
{
smp_intr_init();
@@ -195,12 +178,36 @@ static void __init apic_intr_init(void)
#endif
}
+#ifdef CONFIG_X86_32
+/**
+ * x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors
+ *
+ * Description:
+ * Perform any necessary interrupt initialisation prior to setting up
+ * the "ordinary" interrupt call gates. For legacy reasons, the ISA
+ * interrupts should be initialised here if the machine emulates a PC
+ * in any way.
+ **/
+static void __init x86_quirk_pre_intr_init(void)
+{
+ if (x86_quirks->arch_pre_intr_init) {
+ if (x86_quirks->arch_pre_intr_init())
+ return;
+ }
+ init_ISA_irqs();
+}
+#endif
+
void __init native_init_IRQ(void)
{
int i;
+#ifdef CONFIG_X86_32
/* Execute any quirks before the call gates are initialised: */
x86_quirk_pre_intr_init();
+#else
+ init_ISA_irqs();
+#endif
/*
* Cover the whole vector space, no vector can escape
@@ -208,9 +215,15 @@ void __init native_init_IRQ(void)
* 'special' SMP interrupts)
*/
for (i = FIRST_EXTERNAL_VECTOR; i < NR_VECTORS; i++) {
+#ifdef CONFIG_X86_32
/* SYSCALL_VECTOR was reserved in trap_init. */
if (i != SYSCALL_VECTOR)
set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]);
+#else
+ /* IA32_SYSCALL_VECTOR was reserved in trap_init. */
+ if (i != IA32_SYSCALL_VECTOR)
+ set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]);
+#endif
}
apic_intr_init();
@@ -218,6 +231,7 @@ void __init native_init_IRQ(void)
if (!acpi_ioapic)
setup_irq(2, &irq2);
+#ifdef CONFIG_X86_32
/*
* Call quirks after call gates are initialised (usually add in
* the architecture specific gates):
@@ -232,4 +246,5 @@ void __init native_init_IRQ(void)
setup_irq(FPU_IRQ, &fpu_irq);
irq_ctx_init(smp_processor_id());
+#endif
}