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Amazingly, parisc was the only arch effected by this...
Convert register-sized loads/stores to always be 32-bit for these fields.
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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Kyle,
This patch removes remnants of softirq support that we no longer need.
I suspect this was just overlooked when willy convert parisc to generic
IRQ support.
Tested on c3600 32-bit UP.
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
[and tested on a c8000 64-bit SMP --kyle]
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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- noticed by Randolph Chung (tausq)
Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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Use the macros in entry.S
Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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And unmask the pselect6/ppoll system calls.
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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And clean up 32/64bit branch assembler statements
Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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intr_restore in intr_do_preempt. This prevents the execution
of an unwanted insn...
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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Abstract existing shift register left macros as shift register
right are. This lends itself to a nice clean up of some #ifdef
blocks in entry.S
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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The patch below corrects multiple occurances of "the the"
typos across several files, both in source comments and KConfig files.
There is no actual code changed, only text. Note this only affects the /arch
directory, and I believe I could find many more elsewhere. :)
Signed-off-by: Adrian Bunk <bunk@stusta.de>
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Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
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ldcw,co should always be used on pa2.0, otherwise the strict cache
width alignment requirement is not relaxed.
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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More work towards supporing multiple page sizes on 64-bit. Convert
some assumptions that 64bit uses 3 level page tables into testing
PT_NLEVELS. Also some BUG() to BUG_ON() conversions and some cleanups
to assembler.
Signed-off-by: Helge Deller <deller@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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We were only copying 32-bits of the PTE/PFN, not the full 52-bits.
Signed-off-by: Helge Deller <deller@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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Document clobbers and args in entry.S and syscall.S.
entry.S: Add comment to indicate that cr27 may recycle and EDEADLOCK
detection is not 100% correct. Since this is only enabled when using
ENABLE_LWS_DEBUG, the user is warned by the comment.
Signed-off-by: Carlos O'Donell <carlos@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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remove the spurious do_softirq calls from entry.S
With these in we were calling do_softirq twice; plus the calls in
entry.S took no account of nesting.
Signed-off-by: James Bottomley <jejb@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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Fix the alloc_slabmgmt panic
Hopefully this should also fix a lot of other intermittent kernel bugs.
The problem has been around since 2.6.9-rc2-pa6 when we allowed
floating point registers to be used in kernel code. The essence of
the problem is that gcc prefers to use floating point for integer
divides and multiples. Further, it can rely on the values in the no
clobber fp regs being correct across a function call. Unfortunately,
our task switch function only saves the integer no clobber registers,
not the fp ones, so if gcc makes a function call to any function in
the kernel which could sleep, the values it is relying on in any no
clobber floating point register may be lost. In the case of
alloc_slabmgmt, the value of the page offset is being stored in %fr12
across a call to kmem_getpages(), which sleeps if no pages are
available. Thus, the offset can be trashed and the slab code can end
up with a completely bogus address leading to corruption.
Kudos to Randolph who came up with the program to trip this problem at
will and thus allowed it to be tracked and fixed.
Signed-off-by: James Bottomley <jejb@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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2.6.12-rc4-pa3 s/__LP64__/CONFIG_64BIT/ and fixup config.h usage
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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convert some bl calls to b,l or bv to use longer offsets
Signed-off-by: Randolph Chung <tausq@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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2.6.12-rc4-pa3 : first pass at making sure use of RFI conforms to
PA 2.0 arch pages F-4 and F-5, PA 1.1 Arch page 3-19 and 3-20.
The discussion revolves around all the rules for clearing PSW Q-bit.
The hard part is meeting all the rules for "relied upon translation".
.align directive is used to guarantee the critical sequence ends more than
8 instructions (32 bytes) from the end of page.
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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Delete obsoleted parts form arch makefiles and rename to asm-offsets.h
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
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Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
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