diff options
Diffstat (limited to 'drivers/mtd/nand/spia.c')
| -rw-r--r-- | drivers/mtd/nand/spia.c | 101 |
1 files changed, 53 insertions, 48 deletions
diff --git a/drivers/mtd/nand/spia.c b/drivers/mtd/nand/spia.c index 9cf1ce718ec..1f6d429b158 100644 --- a/drivers/mtd/nand/spia.c +++ b/drivers/mtd/nand/spia.c @@ -39,16 +39,16 @@ static struct mtd_info *spia_mtd = NULL; */ #define SPIA_IO_BASE 0xd0000000 /* Start of EP7212 IO address space */ #define SPIA_FIO_BASE 0xf0000000 /* Address where flash is mapped */ -#define SPIA_PEDR 0x0080 /* - * IO offset to Port E data register - * where the CLE, ALE and NCE pins - * are wired to. - */ -#define SPIA_PEDDR 0x00c0 /* - * IO offset to Port E data direction - * register so we can control the IO - * lines. - */ +#define SPIA_PEDR 0x0080 /* + * IO offset to Port E data register + * where the CLE, ALE and NCE pins + * are wired to. + */ +#define SPIA_PEDDR 0x00c0 /* + * IO offset to Port E data direction + * register so we can control the IO + * lines. + */ /* * Module stuff @@ -69,79 +69,84 @@ module_param(spia_peddr, int, 0); */ static const struct mtd_partition partition_info[] = { { - .name = "SPIA flash partition 1", - .offset = 0, - .size = 2*1024*1024 - }, + .name = "SPIA flash partition 1", + .offset = 0, + .size = 2 * 1024 * 1024}, { - .name = "SPIA flash partition 2", - .offset = 2*1024*1024, - .size = 6*1024*1024 - } + .name = "SPIA flash partition 2", + .offset = 2 * 1024 * 1024, + .size = 6 * 1024 * 1024} }; -#define NUM_PARTITIONS 2 +#define NUM_PARTITIONS 2 /* * hardware specific access to control-lines -*/ -static void spia_hwcontrol(struct mtd_info *mtd, int cmd){ - - switch(cmd){ + * + * ctrl: + * NAND_CNE: bit 0 -> bit 2 + * NAND_CLE: bit 1 -> bit 0 + * NAND_ALE: bit 2 -> bit 1 + */ +static void spia_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *chip = mtd->priv; - case NAND_CTL_SETCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x01; break; - case NAND_CTL_CLRCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x01; break; + if (ctrl & NAND_CTRL_CHANGE) { + void __iomem *addr = spia_io_base + spia_pedr; + unsigned char bits; - case NAND_CTL_SETALE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x02; break; - case NAND_CTL_CLRALE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x02; break; + bits = (ctrl & NAND_CNE) << 2; + bits |= (ctrl & NAND_CLE | NAND_ALE) >> 1; + writeb((readb(addr) & ~0x7) | bits, addr); + } - case NAND_CTL_SETNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x04; break; - case NAND_CTL_CLRNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x04; break; - } + if (cmd != NAND_CMD_NONE) + writeb(cmd, chip->IO_ADDR_W); } /* * Main initialization routine */ -int __init spia_init (void) +static int __init spia_init(void) { struct nand_chip *this; /* Allocate memory for MTD device structure and private data */ - spia_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip), - GFP_KERNEL); + spia_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); if (!spia_mtd) { - printk ("Unable to allocate SPIA NAND MTD device structure.\n"); + printk("Unable to allocate SPIA NAND MTD device structure.\n"); return -ENOMEM; } /* Get pointer to private data */ - this = (struct nand_chip *) (&spia_mtd[1]); + this = (struct nand_chip *)(&spia_mtd[1]); /* Initialize structures */ - memset((char *) spia_mtd, 0, sizeof(struct mtd_info)); - memset((char *) this, 0, sizeof(struct nand_chip)); + memset(spia_mtd, 0, sizeof(struct mtd_info)); + memset(this, 0, sizeof(struct nand_chip)); /* Link the private data with the MTD structure */ spia_mtd->priv = this; + spia_mtd->owner = THIS_MODULE; /* * Set GPIO Port E control register so that the pins are configured * to be outputs for controlling the NAND flash. */ - (*(volatile unsigned char *) (spia_io_base + spia_peddr)) = 0x07; + (*(volatile unsigned char *)(spia_io_base + spia_peddr)) = 0x07; /* Set address of NAND IO lines */ - this->IO_ADDR_R = (void __iomem *) spia_fio_base; - this->IO_ADDR_W = (void __iomem *) spia_fio_base; + this->IO_ADDR_R = (void __iomem *)spia_fio_base; + this->IO_ADDR_W = (void __iomem *)spia_fio_base; /* Set address of hardware control function */ - this->hwcontrol = spia_hwcontrol; + this->cmd_ctrl = spia_hwcontrol; /* 15 us command delay time */ this->chip_delay = 15; /* Scan to find existence of the device */ - if (nand_scan (spia_mtd, 1)) { - kfree (spia_mtd); + if (nand_scan(spia_mtd, 1)) { + kfree(spia_mtd); return -ENXIO; } @@ -151,22 +156,22 @@ int __init spia_init (void) /* Return happy */ return 0; } + module_init(spia_init); /* * Clean up routine */ -#ifdef MODULE -static void __exit spia_cleanup (void) +static void __exit spia_cleanup(void) { /* Release resources, unregister device */ - nand_release (spia_mtd); + nand_release(spia_mtd); /* Free the MTD device structure */ - kfree (spia_mtd); + kfree(spia_mtd); } + module_exit(spia_cleanup); -#endif MODULE_LICENSE("GPL"); MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com"); |