diff options
Diffstat (limited to 'arch/mips/mipssim/sim_time.c')
| -rw-r--r-- | arch/mips/mipssim/sim_time.c | 52 |
1 files changed, 22 insertions, 30 deletions
diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c index e7fa0d1078a..bfaafa38846 100644 --- a/arch/mips/mipssim/sim_time.c +++ b/arch/mips/mipssim/sim_time.c @@ -75,25 +75,6 @@ static unsigned int __init estimate_cpu_frequency(void) return count; } -void __init plat_time_init(void) -{ - unsigned int est_freq, flags; - - local_irq_save(flags); - - /* Set Data mode - binary. */ - CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); - - est_freq = estimate_cpu_frequency(); - - printk(KERN_INFO "CPU frequency %d.%02d MHz\n", est_freq / 1000000, - (est_freq % 1000000) * 100 / 1000000); - - cpu_khz = est_freq / 1000; - - local_irq_restore(flags); -} - static int mips_cpu_timer_irq; static void mips_timer_dispatch(void) @@ -102,26 +83,37 @@ static void mips_timer_dispatch(void) } -void __init plat_timer_setup(struct irqaction *irq) +unsigned __init get_c0_compare_int(void) { +#ifdef MSC01E_INT_BASE if (cpu_has_veic) { set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch); mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR; } else { +#endif if (cpu_has_vint) set_vi_handler(cp0_compare_irq, mips_timer_dispatch); mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; } - /* we are using the cpu counter for timer interrupts */ - setup_irq(mips_cpu_timer_irq, irq); + return mips_cpu_timer_irq; +} -#ifdef CONFIG_SMP - /* irq_desc(riptor) is a global resource, when the interrupt overlaps - on seperate cpu's the first one tries to handle the second interrupt. - The effect is that the int remains disabled on the second cpu. - Mark the interrupt with IRQ_PER_CPU to avoid any confusion */ - irq_desc[mips_cpu_timer_irq].flags |= IRQ_PER_CPU; - set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq); -#endif +void __init plat_time_init(void) +{ + unsigned int est_freq, flags; + + local_irq_save(flags); + + /* Set Data mode - binary. */ + CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); + + est_freq = estimate_cpu_frequency(); + + printk(KERN_INFO "CPU frequency %d.%02d MHz\n", est_freq / 1000000, + (est_freq % 1000000) * 100 / 1000000); + + cpu_khz = est_freq / 1000; + + local_irq_restore(flags); } |