path: root/include/asm-parisc/io.h
diff options
authorKyle McMartin <kyle@parisc-linux.org>2006-04-20 21:16:32 +0000
committerKyle McMartin <kyle@hera.kernel.org>2006-04-21 22:20:35 +0000
commit1b52d7c2210b9a64c5cba6aded478c8217a8853c (patch)
tree4fe47a5723720a7df5cd15997cf725e5363e276b /include/asm-parisc/io.h
parent6ca773cf8b9dc19989c9b44635292b1ba80f9112 (diff)
[PARISC] Make ioremap default to _nocache
Since it is way more work to change most drivers to comply with parisc, take the easy way out and make ioremap _NO_CACHE by default. This is in line with what powerpc does. Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'include/asm-parisc/io.h')
1 files changed, 5 insertions, 12 deletions
diff --git a/include/asm-parisc/io.h b/include/asm-parisc/io.h
index 29da31194b9..244f6b8883f 100644
--- a/include/asm-parisc/io.h
+++ b/include/asm-parisc/io.h
@@ -126,24 +126,17 @@ static inline void gsc_writeq(unsigned long long val, unsigned long addr)
extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
-extern inline void __iomem * ioremap(unsigned long offset, unsigned long size)
- return __ioremap(offset, size, 0);
- * This one maps high address device memory and turns off caching for that area.
- * it's useful if some control registers are in such an area and write combining
- * or read caching is not desirable:
+/* Most machines react poorly to I/O-space being cacheable... Instead let's
+ * define ioremap() in terms of ioremap_nocache().
-extern inline void * ioremap_nocache(unsigned long offset, unsigned long size)
+extern inline void __iomem * ioremap(unsigned long offset, unsigned long size)
- return __ioremap(offset, size, _PAGE_NO_CACHE /* _PAGE_PCD */);
+ return __ioremap(offset, size, _PAGE_NO_CACHE);
+#define ioremap_nocache(off, sz) ioremap((off), (sz))
extern void iounmap(void __iomem *addr);
static inline unsigned char __raw_readb(const volatile void __iomem *addr)
return (*(volatile unsigned char __force *) (addr));