diff options
| author | Mike Frysinger <michael.frysinger@analog.com> | 2007-05-21 18:09:23 +0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-21 09:50:22 -0700 |
| commit | 30870b93cd76bdfa7385f8d471345f5f6269fb00 (patch) | |
| tree | e777e79962dbf78b842ca798cd3dc1245bf7cf13 /arch | |
| parent | eb8d5f6c0322e641ec32ed632dd3b02586205673 (diff) | |
Blackfin arch: dont clear status register bits in SWRST so we can actually use it
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/blackfin/mach-bf533/head.S | 6 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf537/head.S | 6 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf561/head.S | 6 |
3 files changed, 0 insertions, 18 deletions
diff --git a/arch/blackfin/mach-bf533/head.S b/arch/blackfin/mach-bf533/head.S index 4808edb0680..7cb8258841d 100644 --- a/arch/blackfin/mach-bf533/head.S +++ b/arch/blackfin/mach-bf533/head.S @@ -468,12 +468,6 @@ ENTRY(_bfin_reset) w[p0] = r0.l; #endif - /* Clear the bits 13-15 in SWRST if they werent cleared */ - p0.h = hi(SWRST); - p0.l = lo(SWRST); - csync; - r0.l = w[p0]; - /* Clear the IMASK register */ p0.h = hi(IMASK); p0.l = lo(IMASK); diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S index d104e1d8e07..de78e4281ae 100644 --- a/arch/blackfin/mach-bf537/head.S +++ b/arch/blackfin/mach-bf537/head.S @@ -504,12 +504,6 @@ _delay_lab1_end: nop; #endif - /* Clear the bits 13-15 in SWRST if they werent cleared */ - p0.h = hi(SWRST); - p0.l = lo(SWRST); - csync; - r0.l = w[p0]; - /* Clear the IMASK register */ p0.h = hi(IMASK); p0.l = lo(IMASK); diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S index 7bca478526b..462c39ed8ec 100644 --- a/arch/blackfin/mach-bf561/head.S +++ b/arch/blackfin/mach-bf561/head.S @@ -414,12 +414,6 @@ ENTRY(_bfin_reset) w[p0] = r0.l; #endif - /* Clear the bits 13-15 in SWRST if they werent cleared */ - p0.h = hi(SICA_SWRST); - p0.l = lo(SICA_SWRST); - csync; - r0.l = w[p0]; - /* Clear the IMASK register */ p0.h = hi(IMASK); p0.l = lo(IMASK); |