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authorBrian Gerst <bgerst@didntduck.org>2007-05-21 14:31:53 +0200
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-21 09:56:57 -0700
commit17304383ebc1ce68a88030ac4d18ea549d9578c7 (patch)
treeddeebffef6841cc421e9fc9bf5429b4a97057363 /arch
parentd0aff6e6f4e54f79f9c89d147d371bad384454e9 (diff)
downloadlinux-2.6.34-ux500-17304383ebc1ce68a88030ac4d18ea549d9578c7.tar.gz
i386: fix PGE mask
cr4 is a 32-bit register, so casting the mask to an unsigned char is wrong, as it clears more than the PGE bit. Signed-off-by: Brian Gerst <bgerst@didntduck.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/i386/kernel/cpu/mtrr/cyrix.c2
-rw-r--r--arch/i386/kernel/cpu/mtrr/state.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/i386/kernel/cpu/mtrr/cyrix.c b/arch/i386/kernel/cpu/mtrr/cyrix.c
index 0737a596db4..9edf5625584 100644
--- a/arch/i386/kernel/cpu/mtrr/cyrix.c
+++ b/arch/i386/kernel/cpu/mtrr/cyrix.c
@@ -136,7 +136,7 @@ static void prepare_set(void)
/* Save value of CR4 and clear Page Global Enable (bit 7) */
if ( cpu_has_pge ) {
cr4 = read_cr4();
- write_cr4(cr4 & (unsigned char) ~(1 << 7));
+ write_cr4(cr4 & ~X86_CR4_PGE);
}
/* Disable and flush caches. Note that wbinvd flushes the TLBs as
diff --git a/arch/i386/kernel/cpu/mtrr/state.c b/arch/i386/kernel/cpu/mtrr/state.c
index f62ecd15811..7b39a2f954d 100644
--- a/arch/i386/kernel/cpu/mtrr/state.c
+++ b/arch/i386/kernel/cpu/mtrr/state.c
@@ -19,7 +19,7 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt)
/* Save value of CR4 and clear Page Global Enable (bit 7) */
if ( cpu_has_pge ) {
ctxt->cr4val = read_cr4();
- write_cr4(ctxt->cr4val & (unsigned char) ~(1 << 7));
+ write_cr4(ctxt->cr4val & ~X86_CR4_PGE);
}
/* Disable and flush caches. Note that wbinvd flushes the TLBs as