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authorPaul Mundt <lethal@linux-sh.org>2008-03-26 19:02:47 +0900
committerPaul Mundt <lethal@linux-sh.org>2008-03-26 19:02:47 +0900
commit9bbafce2eec190ef7e44b0eb1095ba17ce6ad3af (patch)
tree8deae79efc43d39763bdba8ca9b670e6a1782859 /arch
parent05dda977f2574c3341abef9b74c27d2b362e1e3a (diff)
sh: Fix occasional FPU register corruption under preempt.
Presently with preempt enabled there's the possibility to be preempted after the TIF_USEDFPU test and the register save, leading to bogus state post-__switch_to(). Use an explicit preempt_disable()/enable() pair around unlazy_fpu()/clear_fpu() to avoid this. Follows the x86 change. Reported-by: Takuo Koguchi <takuo.koguchi.sw@hitachi.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/kernel/cpu/sh2a/fpu.c1
-rw-r--r--arch/sh/kernel/cpu/sh4/fpu.c1
-rw-r--r--arch/sh/kernel/cpu/sh5/fpu.c1
-rw-r--r--arch/sh/kernel/dump_task.c1
-rw-r--r--arch/sh/kernel/process_32.c1
-rw-r--r--arch/sh/kernel/signal_32.c1
6 files changed, 6 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c
index ff99562456f..5627c0b3ffa 100644
--- a/arch/sh/kernel/cpu/sh2a/fpu.c
+++ b/arch/sh/kernel/cpu/sh2a/fpu.c
@@ -13,6 +13,7 @@
#include <linux/signal.h>
#include <asm/processor.h>
#include <asm/io.h>
+#include <asm/fpu.h>
/* The PR (precision) bit in the FP Status Register must be clear when
* an frchg instruction is executed, otherwise the instruction is undefined.
diff --git a/arch/sh/kernel/cpu/sh4/fpu.c b/arch/sh/kernel/cpu/sh4/fpu.c
index 817f9939cda..8020796139f 100644
--- a/arch/sh/kernel/cpu/sh4/fpu.c
+++ b/arch/sh/kernel/cpu/sh4/fpu.c
@@ -16,6 +16,7 @@
#include <asm/cpu/fpu.h>
#include <asm/processor.h>
#include <asm/system.h>
+#include <asm/fpu.h>
/* The PR (precision) bit in the FP Status Register must be clear when
* an frchg instruction is executed, otherwise the instruction is undefined.
diff --git a/arch/sh/kernel/cpu/sh5/fpu.c b/arch/sh/kernel/cpu/sh5/fpu.c
index 30b76a94abf..dd4f51ffb50 100644
--- a/arch/sh/kernel/cpu/sh5/fpu.c
+++ b/arch/sh/kernel/cpu/sh5/fpu.c
@@ -17,6 +17,7 @@
#include <asm/processor.h>
#include <asm/user.h>
#include <asm/io.h>
+#include <asm/fpu.h>
/*
* Initially load the FPU with signalling NANS. This bit pattern
diff --git a/arch/sh/kernel/dump_task.c b/arch/sh/kernel/dump_task.c
index 4a8a4083ff0..1db7ce0f25d 100644
--- a/arch/sh/kernel/dump_task.c
+++ b/arch/sh/kernel/dump_task.c
@@ -1,5 +1,6 @@
#include <linux/elfcore.h>
#include <linux/sched.h>
+#include <asm/fpu.h>
/*
* Capture the user space registers if the task is not running (in user space)
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index 9ab1926b9d1..b98e37a1f54 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -25,6 +25,7 @@
#include <asm/pgalloc.h>
#include <asm/system.h>
#include <asm/ubc.h>
+#include <asm/fpu.h>
static int hlt_counter;
int ubc_usercnt = 0;
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c
index f6b5fbfe75c..f311551d9a0 100644
--- a/arch/sh/kernel/signal_32.c
+++ b/arch/sh/kernel/signal_32.c
@@ -29,6 +29,7 @@
#include <asm/uaccess.h>
#include <asm/pgtable.h>
#include <asm/cacheflush.h>
+#include <asm/fpu.h>
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))