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authorLinus Torvalds <torvalds@g5.osdl.org>2006-07-03 21:30:03 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2006-07-03 21:30:03 -0700
commit060ec6f2fb3c8abb85927758de8ac5d1018e6a43 (patch)
tree14d451f638805a4db17d6cf38d5003220b1314df /arch
parent0d1782144e81faf6203075c5fcd0a2f0db91af5b (diff)
parent0f1482fdd7e5efc473335b92f350027b8f1519fb (diff)
downloadlinux-2.6.34-ux500-060ec6f2fb3c8abb85927758de8ac5d1018e6a43.tar.gz
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] Fix lh7a40x_udc.c [ARM] Fix warning in consistent.c [ARM] Fix warnings in arch/arm/kernel/setup.c [ARM] Fix ecard.c resource warnings. [ARM] Fix ISA IRQ resources [ARM] Fix bad asm instruction in proc-arm925.S [ARM] More missing proc-macros.S includes [ARM] 3708/2: fix SMP build after section ioremap changes
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/kernel/ecard.c2
-rw-r--r--arch/arm/kernel/setup.c2
-rw-r--r--arch/arm/mach-footbridge/isa-irq.c19
-rw-r--r--arch/arm/mm/ioremap.c5
-rw-r--r--arch/arm/mm/proc-arm1020.S2
-rw-r--r--arch/arm/mm/proc-arm1020e.S2
-rw-r--r--arch/arm/mm/proc-arm1022.S2
-rw-r--r--arch/arm/mm/proc-arm1026.S2
-rw-r--r--arch/arm/mm/proc-arm925.S3
9 files changed, 31 insertions, 8 deletions
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index ab4ad9562ee..b9a74a741d0 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -883,7 +883,7 @@ static ssize_t ecard_show_resources(struct device *dev, struct device_attribute
int i;
for (i = 0; i < ECARD_NUM_RESOURCES; i++)
- str += sprintf(str, "%08lx %08lx %08lx\n",
+ str += sprintf(str, "%08x %08x %08lx\n",
ec->resource[i].start,
ec->resource[i].end,
ec->resource[i].flags);
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 7d6a516c0b9..ed1c4d62d99 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -344,7 +344,7 @@ static void __init setup_processor(void)
cpu_cache = *list->cache;
#endif
- printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08x\n",
+ printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
cpu_name, processor_id, (int)processor_id & 15,
proc_arch[cpu_architecture()], cr_alignment);
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
index e1c43b331d6..87448c2d6ba 100644
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -98,9 +98,22 @@ isa_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
desc_handle_irq(isa_irq, desc, regs);
}
-static struct irqaction irq_cascade = { .handler = no_action, .name = "cascade", };
-static struct resource pic1_resource = { "pic1", 0x20, 0x3f };
-static struct resource pic2_resource = { "pic2", 0xa0, 0xbf };
+static struct irqaction irq_cascade = {
+ .handler = no_action,
+ .name = "cascade",
+};
+
+static struct resource pic1_resource = {
+ .name = "pic1",
+ .start = 0x20,
+ .end = 0x3f,
+};
+
+static struct resource pic2_resource = {
+ .name = "pic2",
+ .start = 0xa0,
+ .end = 0xbf,
+};
void __init isa_init_irq(unsigned int host_irq)
{
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 7eac87f0518..dba7dddfe57 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -303,7 +303,6 @@ __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size,
int err;
unsigned long addr;
struct vm_struct * area;
- unsigned int cr = get_cr();
/*
* High mappings must be supersection aligned
@@ -317,7 +316,7 @@ __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size,
addr = (unsigned long)area->addr;
#ifndef CONFIG_SMP
- if ((((cpu_architecture() >= CPU_ARCH_ARMv6) && (cr & CR_XP)) ||
+ if ((((cpu_architecture() >= CPU_ARCH_ARMv6) && (get_cr() & CR_XP)) ||
cpu_is_xsc3()) &&
!((__pfn_to_phys(pfn) | size | addr) & ~SUPERSECTION_MASK)) {
area->flags |= VM_ARM_SECTION_MAPPING;
@@ -369,6 +368,7 @@ void __iounmap(void __iomem *addr)
addr = (void __iomem *)(PAGE_MASK & (unsigned long)addr);
+#ifndef CONFIG_SMP
/*
* If this is a section based mapping we need to handle it
* specially as the VM subysystem does not know how to handle
@@ -390,6 +390,7 @@ void __iounmap(void __iomem *addr)
}
}
write_unlock(&vmlist_lock);
+#endif
if (!section_mapping)
vunmap(addr);
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index 700297ae4a5..1d8316f3cec 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -34,6 +34,8 @@
#include <asm/procinfo.h>
#include <asm/ptrace.h>
+#include "proc-macros.S"
+
/*
* This is the maximum size of an area which will be invalidated
* using the single invalidate entry instructions. Anything larger
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 0c33a5ed5a6..89b1d6d3d7c 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -34,6 +34,8 @@
#include <asm/procinfo.h>
#include <asm/ptrace.h>
+#include "proc-macros.S"
+
/*
* This is the maximum size of an area which will be invalidated
* using the single invalidate entry instructions. Anything larger
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index 566a5565307..a089528e6bc 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -23,6 +23,8 @@
#include <asm/procinfo.h>
#include <asm/ptrace.h>
+#include "proc-macros.S"
+
/*
* This is the maximum size of an area which will be invalidated
* using the single invalidate entry instructions. Anything larger
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 6ea76321d0d..d6d84d92c7c 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -23,6 +23,8 @@
#include <asm/procinfo.h>
#include <asm/ptrace.h>
+#include "proc-macros.S"
+
/*
* This is the maximum size of an area which will be invalidated
* using the single invalidate entry instructions. Anything larger
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index ad15f8503d5..8d9a9f93b01 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -454,7 +454,8 @@ __arm925_setup:
mcr p15, 7, r0, c15, c0, 0
#endif
- adr r5, {r5, r6}
+ adr r5, arm925_crval
+ ldmia r5, {r5, r6}
mrc p15, 0, r0, c1, c0 @ get control register v4
bic r0, r0, r5
orr r0, r0, r6