diff options
| author | Guennadi Liakhovetski <g.liakhovetski@gmx.de> | 2010-02-03 14:44:12 +0000 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2010-02-08 09:40:24 +0900 |
| commit | 623b4ac4bf9e767991c66e29b47dd4b19458fb42 (patch) | |
| tree | 9cf9c5ef8ac1ab714a35db1baf627fb701a98287 /arch/sh/drivers/dma | |
| parent | fc4618575f79eea062cdc51715040e40cd35b71c (diff) | |
sh: fix Transfer Size calculation in both DMA drivers
Both the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers
do not take into account bits 3:2 of the Transfer Size field in the CHCR
register, besides, bit-field defines set bit 2, but the mask only passes bits
1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all
these issues for sh7722 and sh7724, other CPUs stay unchanged and might need to
be fixed too.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers/dma')
| -rw-r--r-- | arch/sh/drivers/dma/dma-sh.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c index 37fb5b8bbc3..31830cb0af8 100644 --- a/arch/sh/drivers/dma/dma-sh.c +++ b/arch/sh/drivers/dma/dma-sh.c @@ -52,11 +52,14 @@ static inline unsigned int get_dmte_irq(unsigned int chan) * * iterations to complete the transfer. */ +static unsigned int ts_shift[] = TS_SHIFT; static inline unsigned int calc_xmit_shift(struct dma_channel *chan) { u32 chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR); + int cnt = ((chcr & CHCR_TS_LOW_MASK) >> CHCR_TS_LOW_SHIFT) | + ((chcr & CHCR_TS_HIGH_MASK) >> CHCR_TS_HIGH_SHIFT); - return ts_shift[(chcr & CHCR_TS_MASK)>>CHCR_TS_SHIFT]; + return ts_shift[cnt]; } /* |